lan9311 Standard Microsystems Corp., lan9311 Datasheet - Page 342

no-image

lan9311

Manufacturer Part Number
lan9311
Description
Lan9311/lan9311i Two Port 10/100 Managed Ethernet Switch With 16-bit Non-pci Cpu Interface
Manufacturer
Standard Microsystems Corp.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
lan9311-NU
Manufacturer:
CINCERA
Quantity:
3 023
Part Number:
lan9311-NU
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
lan9311-NU
Manufacturer:
SMSC
Quantity:
20 000
Part Number:
lan9311-NZW
Manufacturer:
Standard
Quantity:
2
Part Number:
lan9311-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
lan9311I-NZW
Manufacturer:
Standard
Quantity:
836
Part Number:
lan9311I-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
Revision 1.2 (04-08-08)
14.5.2.18
BITS
31:0
RX Alignment
Count of packets that have between 64 bytes and the maximum allowable
number of bytes and are not byte aligned and have a bad FCS. The max
number of bytes is 1518 for untagged packets and 1522 for tagged packets.
If Jumbo2K (bit 3) is set in the
(MAC_RX_CFG_x), the max number of bytes is 2048.
Note:
Port x MAC Receive Alignment Error Count Register (MAC_RX_ALIGN_CNT_x)
This register provides a counter of received packets with 64 bytes to the maximum allowable, and a
FCS error. The counter is cleared upon being read.
Note: For this counter, a packet with the maximum number of bytes that is not an integral number of
This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 481 hours.
bytes (e.g. a 1518 1/2 byte packet) and a FCS error is considered an alignment error and is
counted.
Register #:
Port0: 041Fh
Port1: 081Fh
Port2: 0C1Fh
DESCRIPTION
Port x MAC Receive Configuration Register
DATASHEET
342
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Size:
32 bits
TYPE
RC
SMSC LAN9311/LAN9311i
00000000h
DEFAULT
Datasheet

Related parts for lan9311