lan9311 Standard Microsystems Corp., lan9311 Datasheet - Page 283

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lan9311

Manufacturer Part Number
lan9311
Description
Lan9311/lan9311i Two Port 10/100 Managed Ethernet Switch With 16-bit Non-pci Cpu Interface
Manufacturer
Standard Microsystems Corp.
Datasheet

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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
BITS
0
Flow Control Busy (FCBSY)
In full-duplex mode, this bit should read logical 0 before writing to the Host
MAC Flow Control (HMAC_FLOW) register. To initiate a PAUSE control
frame, the bit must be set. During a transfer of control frame, this bit
continues to be set, signifying that a frame transmission is in progress. After
the PAUSE control frame’s transmission is complete, the Host MAC resets
the bit to 0.
Backpressure Enable (BkPresEn)
In half-duplex mode, this signal functions as a backpressure enable and is
set high whenever backpressure is transmitted.
Notes:
When writing this register, the FCBSY bit must always be zero.
Applications must always write a zero to this bit
DESCRIPTION
DATASHEET
283
TYPE
R/W
Revision 1.2 (04-08-08)
DEFAULT
0b

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