z85230 ZiLOG Semiconductor, z85230 Datasheet - Page 6

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z85230

Manufacturer Part Number
z85230
Description
Enhanced Serial Communications Controller
Manufacturer
ZiLOG Semiconductor
Datasheet

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Pin Descriptions
PS005303-0907
The Enhanced Serial Communication Controller
functional groups:
Figure 1
both the Z80230 and Z85230. The pin functions are unique to each bus interface version in
the Address/Data group, Bus Timing and Reset group, and Device Control group.
The Address/Data group consists of the bidirectional lines used to transfer data between
the CPU and the ESCC (addresses in the Z80230 are latched by AS). The direction of
these lines depends on whether the operation is a Read or Write operation.
The Timing and Control groups designate the type of transaction to occur and the timing
of the occurrence. The interrupt group provides inputs and outputs for handling and prior-
itizing interrupts. The remaining groups are divided into Channel A and Channel B groups
for:
Address/Data
Bus Timing and Reset
Device Control
Interrupt
Serial Data (both channels)
Peripheral Control (both channels)
Clocks (both channels)
Serial Data (Transmit or Receive)
Peripheral Control (Such as DMA or modem)
Input and Output Line for the Receive and Transmit Clocks
on page 2 and
Figure 2
on page 2 illustrate the pins in each functional group for
TM
(ESCC) pins are divided into seven
Product Specification
Z85230/Z80230
Pin Descriptions
1

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