isp1512a NXP Semiconductors, isp1512a Datasheet - Page 54

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isp1512a

Manufacturer Part Number
isp1512a
Description
Ulpi Hi-speed Usb Transceiver
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
25. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10. Timing of TX_DAT and TX_SE0 to DP and DM . .40
Fig 11. Timing of TX_ENABLE to DP and DM. . . . . . . . .40
Fig 12. Timing of DP and DM to RX_RCV, RX_DP
Fig 13. ULPI timing interface . . . . . . . . . . . . . . . . . . . . . .41
Fig 14. Using the ISP1512A with a standard USB
Fig 15. Using the ISP1512A with a standard USB
Fig 16. Using the ISP1512A with a standard USB
Fig 17. Package outline ISP1512xUK (WLCSP25) . . . . .46
Fig 18. Temperature profiles for large and small
ISP1512A_1
Preliminary data sheet
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . .5
Internal power-on reset timing . . . . . . . . . . . . . . .10
Internal circuit of the V
Interface behavior when entering UART
mode and the clock is powered down . . . . . . . . .19
Interface behavior when entering UART
mode and the clock remains powered . . . . . . . . .19
Interface behavior when exiting UART
mode and the clock is not running . . . . . . . . . . . .20
Interface behavior when exiting UART
mode and the clock is running . . . . . . . . . . . . . . .20
Rise time and fall time . . . . . . . . . . . . . . . . . . . . .40
and RX_DM . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
peripheral controller . . . . . . . . . . . . . . . . . . . . . . .43
host controller . . . . . . . . . . . . . . . . . . . . . . . . . . .44
OTG controller . . . . . . . . . . . . . . . . . . . . . . . . . . .45
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
BUS
pin . . . . . . . . . . . . . . .11
Rev. 01 — 31 July 2008
ULPI HS USB transceiver
ISP1512A
© NXP B.V. 2008. All rights reserved.
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