isp1512a NXP Semiconductors, isp1512a Datasheet - Page 14

• Manufacturer Part Number: isp1512a
• Description: Ulpi Hi-speed Usb Transceiver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
9. Modes of operation
Table 6.
[1]
ISP1512A_1
Preliminary data sheet
Pin name
V
V
CHIP_SEL
TEST, CLOCK, STP, NXT, DIR, DATA[7:0]
REG3V3, REG1V8, DP, DM, XTAL1, XTAL2, RREF
CC
CC(I/O)
These pins must not be externally driven to HIGH. Otherwise, the ISP1512A behavior is undefined and leakage current will occur.
Pin states in power-down mode
8.10.14 GND
9.1.1 Normal mode
9.1.2 Power-down mode
9.1 Power modes
Global ground signal. To ensure the correct operation of the ISP1512A, GND must be
soldered to the cleanest ground available.
When both V
to all the remaining pins, including V
range will not damage the ISP1512A chip.
When both V
ISP1512A will be fully functional as in normal mode.
When V
ISP1512A, the application system must detect the low voltage condition and set the
CHIP_SEL pin to deassert (that is, put the ISP1512A in power-down mode). This is to
protect the ULPI and USB interfaces from driving wrong levels. Under this condition, the
V
digital pins powered by V
must be driven to their defined states, or terminated by using pull-up or pull-down resistors
to avoid floating input condition. Other pins are not powered.
In normal mode, both V
ISP1512A is fully functional.
When V
put into power-down mode. In this mode, internal regulators are powered down to keep
the V
and/or V
When V
CC(I/O)
CC
CC(I/O)
voltage will not leak to USB pins (V
CC(I/O)
CC(I/O)
current to a minimum. The voltage on the V
BUS
pins. In this mode, the ISP1512A pin states are given in
CC(I/O)
CC
is powered and the V
is not present or when the CHIP_SEL pin is deasserted, the ISP1512A is
is not present, all pins are not powered.
and V
and V
CC(I/O)
CC
Rev. 01 — 31 July 2008
CC(I/O)
CC
and V
Pin state when V
present
3.0 V to 4.5 V
not powered
not powered
not powered
not powered
are not powered, there will be no leakage from the V
are powered and are within the operating voltage range, the
are configured as high-impedance inputs. These pins
CC(I/O)
CC
CC
[1]
[1]
[1]
voltage is below the operating range of the
are powered. The CHIP_SEL pin is asserted. The
and V
BUS
CC(I/O)
CC(I/O)
, DP and DM) and the V
is not
. Applying V
CC
pin will not leak to the V
Pin state when CHIP_SEL is
deasserted
3.0 V to 4.5 V
1.65 V to 1.95 V
HIGH
high-Z (inputs are ignored)
not powered
ULPI HS USB transceiver
BUS
within the normal
[1]
ISP1512A
Table
CC
© NXP B.V. 2008. All rights reserved.
pin. All the
6.
CC(I/O)
BUS
13 of 55
pin