isp1512a NXP Semiconductors, isp1512a Datasheet - Page 27

• Manufacturer Part Number: isp1512a
• Description: Ulpi Hi-speed Usb Transceiver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 21.
Table 22.
ISP1512A_1
Preliminary data sheet
Bit
7 to 4 -
3
2
1
0
Bit
Symbol
Reset
Access
Symbol
CLOCK_SUSPENDM
CARKIT_MODE
3PIN_FSLS_SERIAL
6PIN_FSLS_SERIAL
INTF_CTRL - Interface Control register (address R = 07h to 09h, W = 07h, S = 08h, C = 09h) bit
description
OTG_CTRL - OTG Control register (address R = 0Ah to 0Ch, W = 0Ah, S = 0Bh, C = 0Ch) bit allocation
R/W/S/C
10.7 OTG_CTRL register
7
0
This register controls various OTG functions of the ISP1512A. The bit allocation of the
OTG_CTRL register is given in
reserved
R/W/S/C
Description
reserved
Clock Suspend: active-LOW clock suspend.
Powers down the internal clock circuitry only. By default, the clock will not be powered in
6-pin serial mode or 3-pin serial mode.
Valid only in 6-pin serial mode and 3-pin serial mode. Valid only when SUSPENDM is set
to logic 1, otherwise this bit is ignored.
0b — Clock will not be powered in 3-pin or 6-pin serial mode or UART mode
1b — Clock will be powered in 3-pin and 6-pin serial mode or UART mode
Carkit Mode: Changes the ULPI interface to the carkit interface (UART mode). Bits
TXD_EN and RXD_EN in the CARKIT_CTRL register must change as well. The PHY must
automatically clear this bit when carkit mode is exited.
0b — Disable carkit mode
1b — Enable carkit mode
3-Pin Full-Speed Low-Speed Serial Mode: Changes the ULPI interface to a 3-bit serial
interface. The ISP1512A will automatically clear this bit when 3-pin serial mode is exited.
0b — Full-speed or low-speed packets are sent using the parallel interface
1b — Full-speed or low-speed packets are sent using the 3-pin serial interface
6-Pin Full-Speed Low-Speed Serial Mode: Changes the ULPI interface to a 6-bit serial
interface. The ISP1512A will automatically clear this bit when 6-pin serial mode is exited.
0b — Full-speed or low-speed packets are sent using the parallel interface
1b — Full-speed or low-speed packets are sent using the 6-pin serial interface
6
0
R/W/S/C
5
0
Rev. 01 — 31 July 2008
R/W/S/C
CHRG_
VBUS
Table
4
0
22.
DISCHRG_
R/W/S/C
VBUS
3
0
DM_PULL
R/W/S/C
DOWN
2
1
ULPI HS USB transceiver
DP_PULL
R/W/S/C
DOWN
ISP1512A
1
1
© NXP B.V. 2008. All rights reserved.
reserved
R/W/S/C
0
0
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