isp1512a NXP Semiconductors, isp1512a Datasheet - Page 53

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isp1512a

Manufacturer Part Number
isp1512a
Description
Ulpi Hi-speed Usb Transceiver
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
24. Tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10. Signal mapping for 3-pin serial mode . . . . . . .17
Table 11. UART signal mapping . . . . . . . . . . . . . . . . . . .17
Table 12. Operating states and their corresponding
Table 13. Register map . . . . . . . . . . . . . . . . . . . . . . . . . .23
Table 14. VENDOR_ID_LOW - Vendor ID Low
Table 15. VENDOR_ID_HIGH - Vendor ID High
Table 16. PRODUCT_ID_LOW - Product ID Low
Table 17. PRODUCT_ID_HIGH - Product ID High
Table 18. FUNC_CTRL - Function Control register
Table 19. FUNC_CTRL - Function Control register
Table 20. INTF_CTRL - Interface Control register
Table 21. INTF_CTRL - Interface Control register
Table 22. OTG_CTRL - OTG Control register
Table 23. OTG_CTRL - OTG Control register
Table 24. USB_INTR_EN_R - USB Interrupt Enable
Table 25. USB_INTR_EN_R - USB Interrupt Enable
Table 26. USB_INTR_EN_F - USB Interrupt Enable
Table 27. USB_INTR_EN_F - USB Interrupt Enable
Table 28. USB_INTR_STAT - USB Interrupt Status
Table 29. USB_INTR_STAT - USB Interrupt Status
ISP1512A_1
Preliminary data sheet
Ordering information . . . . . . . . . . . . . . . . . . . . .3
Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .5
Recommended V
External capacitor values for 19.2 MHz
clock frequency . . . . . . . . . . . . . . . . . . . . . . . .12
Pin states in power-down mode . . . . . . . . . . . .13
ULPI signal description . . . . . . . . . . . . . . . . . .14
Signal mapping during low-power mode . . . . .15
Signal mapping for 6-pin serial mode . . . . . . .16
resistor settings . . . . . . . . . . . . . . . . . . . . . . . .21
register (address R = 00h) bit description . . . .23
register (address R = 01h) bit description . . . .23
register (address R = 02h) bit description . . . .24
register (address R = 03h) bit description . . . .24
(address R = 04h to 06h, W = 04h, S = 05h,
C = 06h) bit allocation . . . . . . . . . . . . . . . . . . .24
(address R = 04h to 06h, W = 04h, S = 05h,
C = 06h) bit description . . . . . . . . . . . . . . . . . .25
(address R = 07h to 09h, W = 07h, S = 08h,
C = 09h) bit allocation . . . . . . . . . . . . . . . . . . .25
(address R = 07h to 09h, W = 07h, S = 08h,
C = 09h) bit description . . . . . . . . . . . . . . . . . .26
(address R = 0Ah to 0Ch, W = 0Ah, S = 0Bh,
C = 0Ch) bit allocation . . . . . . . . . . . . . . . . . . .26
(address R = 0Ah to 0Ch, W = 0Ah, S = 0Bh,
C = 0Ch) bit description . . . . . . . . . . . . . . . . . .27
Rising register (address R = 0Dh to 0Fh,
W = 0Dh, S = 0Eh, C = 0Fh) bit allocation . . . .27
Rising register (address R = 0Dh to 0Fh,
W = 0Dh, S = 0Eh, C = 0Fh) bit description . .27
Falling register (address R = 10h to 12h,
W = 10h, S = 11h, C = 12h) bit allocation . . . .28
Falling register (address R = 10h to 12h,
W = 10h, S = 11h, C = 12h) bit description . . .28
register (address R = 13h) bit allocation . . . . .28
BUS
capacitor value . . . . . . .11
Rev. 01 — 31 July 2008
Table 30. USB_INTR_L - USB Interrupt Latch
Table 31. USB_INTR_L - USB Interrupt Latch
Table 32. DEBUG - Debug register (address R = 15h)
Table 33. DEBUG - Debug register (address R = 15h)
Table 34. SCRATCH - Scratch register (address
Table 35. CARKIT_CTRL - Carkit Control register
Table 36. CARKIT_CTRL - Carkit Control register
Table 37. PWR_CTRL - Power Control register
Table 38. PWR_CTRL - Power Control register
Table 39. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 40. Recommended operating conditions . . . . . . . . 32
Table 41. Static characteristics: supply pins . . . . . . . . . . 33
Table 42. Static characteristics: digital pins (CLOCK,
Table 43. Static characteristics: analog pins
Table 44. Static characteristics: analog pin V
Table 45. Static characteristics: resistor reference . . . . . 36
Table 46. Static characteristics: pin XTAL1 . . . . . . . . . . . 36
Table 47. Dynamic characteristics: reset and power . . . . 37
Table 48. Dynamic characteristics: clock applied
Table 49. Dynamic characteristics: CLOCK output . . . . . 37
Table 50. Dynamic characteristics: digital I/O pins . . . . . 38
Table 51. Dynamic characteristics: analog I/O pins
Table 52. Dynamic characteristics: analog I/O pins
Table 53. Dynamic characteristics: analog I/O pins
Table 54. Recommended bill of materials . . . . . . . . . . . . 42
Table 55. Lead-free process (from J-STD-020C) . . . . . . 47
Table 56. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 57. Revision history . . . . . . . . . . . . . . . . . . . . . . . . 50
register (address R = 13h) bit description . . . . 28
register (address R = 14h) bit allocation . . . . . 29
register (address R = 14h) bit description . . . . 29
bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . 29
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 29
R = 16h to 18h, W = 16h, S = 17h, C = 18h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . . 30
(address R = 19h to 1Bh, W = 19h, S = 1Ah,
C = 1Bh) bit allocation . . . . . . . . . . . . . . . . . . . 30
(address R = 19h to 1Bh, W = 19h, S = 1Ah,
C = 1Bh) bit description . . . . . . . . . . . . . . . . . . 30
(address R = 3Dh to 3Fh, W = 3Dh, S = 3Eh,
C = 3Fh) bit allocation . . . . . . . . . . . . . . . . . . . 30
(address R = 3Dh to 3Fh, W = 3Dh, S = 3Eh,
C = 3Fh) bit description . . . . . . . . . . . . . . . . . . 31
DIR, STP, NXT, DATA[7:0], CHIP_SEL) . . . . . . 33
(DP, DM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
to XTAL1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
(DP, DM) in USB mode . . . . . . . . . . . . . . . . . . 38
(DP, DM) in transparent UART mode . . . . . . . 38
(DP, DM) in serial mode . . . . . . . . . . . . . . . . . 39
ULPI HS USB transceiver
ISP1512A
© NXP B.V. 2008. All rights reserved.
BUS
. . . . . . 35
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