ucb1500 NXP Semiconductors, ucb1500 Datasheet - Page 8

• Manufacturer Part Number: ucb1500
• Description: Pci To Ac97 Bridge/host Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 07443
Product specification
[07-06]: Status Register
Table 6:
[08]: Revision ID (read only):
[0B-09]: Class Code Register (read only):
communication controller, generic modem. Programmable through EEPROM
interface or register 47-45h.
[0C]: Cache Line Size (read only):
[0D]: Latency Timer
Table 7:
Bit
15
14
13
12
11(r)
10-9(r)
8
7(r)
6(r)
5(r)
4(r)
3-0
Bit
7-4
3-0(r)
Status Register bit description
Latency Timer register bit description
Description
PERR detected
Set to ‘1’ whenever parity error is detected. Write ‘1’ to clear.
SERR asserted
Set to ‘1’ if UCB1500 asserted SERR. Write ‘1' to clear.
Received master abort
If set, UCB1500 has received master abort during its slave operation. Write ‘1’ to
clear.
Received target abort
If set, UCB1500 has received target abort during its master operation. Write `1'
to clear
Target abort
Always ‘0’; UCB1500 never signals target abort.
Timing
Always 01b; wait state during slave access to UCB1500.
PERR reported
Not implemented, always 0.
Fast back-to-back capable
Always ‘1’; NO wait state between PCI cycles.
User Definable features
Always ‘0’; device does not support user definable features.
66 MHz capable bit
Always ‘0’; device is 33 MHz device only.
Capabilities bit (read only)
Always ‘1’; capabilities present.
Reserved.
Description
Latency Timer
Bits 7-4 of the latency timer, in units of PCI clocks * 16.
Latency Timer
These bits are read only and are always 0000b, giving timer granularity of 16 PCI
clocks.
Rev. 03 — 7 July 2000
Current revision of chip = 1.
Always 0; no cache supported.
Value = 070300h for simple
PCI to AC97 bridge/host controller
© Philips Electronics N.V. 2000. All rights reserved.
UCB1500
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