ucb1500 NXP Semiconductors, ucb1500 Datasheet - Page 44

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ucb1500

Manufacturer Part Number
ucb1500
Description
Pci To Ac97 Bridge/host Controller
Manufacturer
NXP Semiconductors
Datasheet

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Product specification
9.1 Transmit Descriptor Table format
Table 67: Transmit Descriptor Table format
Table 68: Command/status register bit description
BASEADDR
COUNT
CMD/STT
Bit
15
14
13
12-8
7
6
5-0
Description
DT termination bit: If set, the current entry is the last entry of the DT. If link-bit is
’1’, the address field contains an address for the next DT table. Otherwise, the
address field contains the buffer address for the current packet data.
Should always be set to 1.
Invalid entry bit: If set, it means that the current descriptor entry is not a valid
entry. For transmission, this means that all the data pointed to by the descriptor
has been transmitted. If the UCB1500 reads a descriptor entry with this bit set, it
enters the hold condition (see hold condition section).
Reserved.
DT Link bit: If set, the current descriptor entry is a link pointer to another
descriptor table. This bit is only valid when both bit[15] and bit[7] are set to 1.
Otherwise, this bit is undefined.
Interrupt bit: Generate Transmit DMA done interrupt at the completion of this
DT data entry.
Reserved.
Description
Byte count of data buffer
Command/status register (refer to
Rev. 03 — 7 July 2000
Base address of the data buffer if the DT Link bit is not enabled.
Link pointer if the DT Link bit is enabled.
PCI to AC97 bridge/host controller
Table
68).
© Philips Electronics N.V. 2000. All rights reserved.
UCB1500
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