gc80c521a CORERIVER Semiconductor, gc80c521a Datasheet - Page 133

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gc80c521a

Manufacturer Part Number
gc80c521a
Description
Flash / Isp / Iap 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
CNT7
Appendix B :
PWM1CON
PWM1CNT(A3h) : PWMA CH1 Counter Register
-
CPS2, CPS1, CPS0 : PWMA counter frequency selection.
PWMOVF : PWMA counter overflow flag.
PWMEN : PWMA counter run control bit.
Software can write this register for the initialization of the counter.
CNT6
CPS2
[0,0,0] = FOSC / 1 ; Default
[0,0,1] = FOSC / 2
[0,1,0] = FOSC / 4
[0,1,1] = FOSC / 8
[1,0,0] = FOSC / 16
[1,0,1] = FOSC / 32
[1,1,0] = FOSC / 64
[1,1,1] = FOSC / 128
Set by hardware and cleared by software.
PWMOVF flags an interrupt.
[0] = Stop the PWMA counter.
[1] = Run the PWMA counter.
(A2h) : PWMA CH1 Control Register
CNT5
CPS1
CPS0
CNT4
CNT3
SFR Description [A2h ~ A7h]
-
CNT2
-
PWMOVF PWMEN
CNT1
CNT0
PWMD.7
PWMD.7
PWMD.7
PWMD.7
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
PWMA counter rolls over.
PWM1D0
PWM1D1
PWM1D2
PWM1D3
Each Module has a internal buffer register for the duty data register.
The buffer register is updated with the new data whenever the
When user write, the data register is written.
When user read, the contents of buffer register is read out.
PWMD.6
PWMD.6
PWMD.6
PWMD.6
(A4h) : PWMA CH1 Duty Data Register of Module 0
(A5h) : PWMA CH1 Duty Data Register of Module 1
(A6h) : PWMA CH1 Duty Data Register of Module 2
(A7h) : PWMA CH1 Duty Data Register of Module 3
PWMD.5
PWMD.5
PWMD.5
PWMD.5
(7/19)
PWMD.4
PWMD.4
PWMD.4
PWMD.4
MiDAS1.0B Family
PWMD.3
PWMD.3
PWMD.3
PWMD.3
PWMD.2
PWMD.2
PWMD.2
PWMD.2
PWMD.1
PWMD.1
PWMD.1
PWMD.1
PWMD.0
PWMD.0
PWMD.0
PWMD.0
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