mpc5125 Freescale Semiconductor, Inc, mpc5125 Datasheet - Page 65

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mpc5125

Manufacturer Part Number
mpc5125
Description
Mpc5125 Microcontroller Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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NOTES:
1
2
Freescale Semiconductor
Sym
Sym
MDC is generated by the MPC5125 with a duty cycle of 50% except when MII_SPEED in the FEC MII_SPEED control register
is changed during operation. See the MPC5125 Reference Manual (MPC5125RM).
The MDC period must be set to a value of less than or equal to 2.5 MHz (to be compliant with the IEEE MII characteristic) by
programming the FEC MII_SPEED control register. See the MPC5125 Reference Manual (MPC5125RM).
t
t
t
t
t
t
t
17
18
19
20
21
22
23
CRS, COL minimum pulse width
MDC falling edge to MDIO output delay
MDIO ( input ) to MDC rising edge setup
MDIO ( input ) to MDC rising edge hold
MDC pulse width high
MDC pulse width low
MDC period
2
TXD[3:0] (Outputs)
TX_CLK (Input)
Table 32. MII Serial Management Channel Signal Timing
1
1
Figure 28. Ethernet Timing Diagram — MII Tx Signal
Description
Description
Figure 29. Ethernet Timing Diagram — MII Async
TX_EN
TX_ER
MPC5125 Microcontroller Data Sheet, Rev. 3
CRS, COL
Table 31. MII Async Signal Timing
t
t
10
9
, t
, t
t
13
11
14
, t
15
t
17
t
12
, t
Min
160
160
400
16
10
0
0
Min
1.5
Max
25
Electrical and Thermal Characteristics
Max
TX_CLK Period
Unit
Unit
ns
ns
ns
ns
ns
ns
SpecID
SpecID
A11.17
A11.18
A11.19
A11.20
A11.21
A11.22
A11.23
65

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