mpc5125 Freescale Semiconductor, Inc, mpc5125 Datasheet - Page 37

• Manufacturer Part Number: mpc5125
• Description: Mpc5125 Microcontroller Data Sheet
• Manufacturer: Freescale Semiconductor, Inc

NOTES:
1
2
3
4.1.3
Table 6
Freescale Semiconductor
Supply voltage — standard I / O buffers
Supply voltage — memory I / O buffers
(DDR)
Supply voltage — memory I/O buffers
(DDR2, LPDDR, Mobile SDR)
Supply voltage — memory I/O buffers
(SDR)
Input reference voltage (DDR/DDR2)
Termination voltage (DDR2)
Supply voltage — system APLL
Supply voltage — system oscillator
and temperature sensor
Supply voltage — e300 APLL
Supply voltage — RTC (hibernation)
Supply voltage — FUSE programming
Input voltage — standard I/O buffers
Input voltage — memory I/O buffers
(DDR)
Input voltage — memory I/O buffers
(DDR2)
Input voltage — memory I/O buffers
(SDR)
Input voltage — memory I/O buffers
(LPDDR)
Ambient operating temperature range
Input high voltage
Input high voltage
These are recommended and tested operating conditions. Proper device operation outside these conditions is not guaranteed.
The State Retention voltage can be applied to VDD after the device is placed in deep-sleep mode.
VBAT should not be supplied by a battery of voltage less than 3.0 V.
Characteristic
gives the DC electrical characteristics for the MPC5125 at recommended operating conditions.
Characteristic
DC Electrical Specifications
Input type = TTL V
Table 5. Recommended Operating Conditions (continued)
V
Input type = TTL
DD_IO_MEM_DDR
Condition
MPC5125 Microcontroller Data Sheet, Rev. 3
V
V
V
V
Table 6. DC Electrical Specifications
AV
DD_IO_MEM_
DD_IO_MEM_DDR2
AV
DD_IO_MEM_DDR
DD_IO_MEM_SDR
AV
AV
DD_OSC_TMPS
V
V
DD_FUSEWR
V
V
V
MV
in_LPDDR
DD_IO
V
in_DDR2
MV
DD_SPLL
DD_CPLL
Sym
in_DDR
in_SDR
DD_IO
BAT
V
T
REF
A
in
TT
3
LPDDR
Sym
V
V
MV
IH
IH
V
DD_IO_MEM
REF
0.49 ×
Min
–40
3.0
2.3
1.7
3.0
3.0
3.0
3.0
3.0
3.0
0
0
0
0
0
– 0.04
1
MV
0.51 × V
REF
Min
V
+ 0.15
DD_IO
DD_IO_MEM
MV
0.50 ×
Typ
3.3
2.5
1.8
3.3
3.3
3.3
3.3
3.3
3.3
—
—
—
—
—
—
REF
Electrical and Thermal Characteristics
MV
V
MEM_LPDDR
MEM_DDR2
DD_IO_MEM
MEM_DDR
MEM_SDR
V
V
V
V
V
REF
0.51 ×
Max
DD_IO_
DD_IO_
DD_IO_
DD_IO_
Max
DD_IO
+85
3.6
2.7
1.9
3.6
3.6
3.6
3.6
3.6
3.6
—
—
+ 0.04
1
Unit
o
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
C
Unit SpecID
V
V
SpecID
D2.19
D2.10
D2.11
D2.12
D2.14
D2.15
D2.16
D2.20
D2.18
D2.17
D2.3
D2.4
D2.5
D2.6
D2.7
D2.8
D2.9
D3.1
D3.2
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