mpc5125 Freescale Semiconductor, Inc, mpc5125 Datasheet - Page 55

• Manufacturer Part Number: mpc5125
• Description: Mpc5125 Microcontroller Data Sheet
• Manufacturer: Freescale Semiconductor, Inc

4.3.6
The local-plus bus is the external bus interface of the MPC5125. A maximum of eight configurable chip selects (CS) are
provided. There are two main modes of operation: non-MUXed and MUXed. The reference clock is the LPC CLK. The
maximum bus frequency is 66 MHz.
Definition of terms:
Freescale Semiconductor
Sym
t
t
t
t
t
t
t
t
t
t
OD
t
t
t
t
t
t
t
t
t
10
11
12
13
14
15
16
17
18
3
4
5
6
7
8
9
1
2
CS[x], ADDR, R/W, TSIZ, DATA (wr), TS,
OE valid after LPC CLK
(Output delay related to LPC CLK)
Non-burst CS[x] pulse width
ADDR, R/W, TSIZ, DATA (wr) valid before
CS[x] assertion
OE assertion after CS[x] assertion
ADDR, R/W, TSIZ, data (wr) hold after
CS[x] negation
TS pulse width
DATA (rd) setup before LPC CLK
DATA (rd) input hold
Read burst CS[x] pulse width
Burst ACK pulse width
Burst DATA (rd) input hold
Read burst ACK assertion after CS[x] assertion
Non-MUXed write burst CS[x] pulse width
Write burst ADDR, R/W, TSIZ, DATA (wr)
hold after CS[x] negation
Write burst ACK assertion after CS[x] assertion
Write burst DATA valid
Non-MUXed mode: asynchronous write
burst ADDR valid before write DATA valid
MUXed mode: ADDR cycle
MUXed mode: ALE cycle
WS = Wait state
DC = Dead cycle
HC = Hold cycle
DS = Data size in bytes
BBT =Burst bytes per transfer
AL = Address latch enable length
ALT = Chip select/Address Latch Timing
t
LPCck
LPC
= LPC clock period
Description
MPC5125 Microcontroller Data Sheet, Rev. 3
(2.5 + WS + BBT/DS) × t
(2 + WS + BBT/DS) × t
Table 25. LPC Timing
(2.5 + WS) × t
AL × 2 × t
(BBT/DS) × t
0.5 × t
0.5 × t
(2 + WS) × t
(2+WS) × t
t
t
t
t
AL × t
LPCck
LPCck
LPCck
LPCck
t
LPCck
LPCck
LPCck
Min
LPCck
0
5
0
0
LPCck
− t
− t
− t
– t
LPCck
LPCck
OD
OD
OD
OD
LPCck
– t
– t
LPCck
– t
OD
OD
– t
OD
LPCck
LPCck
OD
(2.5 + WS + BBT/DS) × t
(2 +WS + BBT/DS) × t
(2.5 + WS) × t
(HC + 0.5) × t
(HC + 1) × t
(BBT/DS) × t
0.5 × t
(2 + WS) × t
(DC + 1) × t
Electrical and Thermal Characteristics
(2+WS) × t
AL × 2 × t
t
t
AL × t
LPCck
LPCck
t
LPCck
LPCck
Max
—
—
—
5
LPCck
LPCck
+ t
+ t
LPCck
LPCck
LPCck
LPCck
OD
OD
LPCck
LPCck
+ t
LPCck
OD
+ t
+ t
+ t
LPCck
OD
LPCck
OD
OD
Units SpecID
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
A7.10
A7.11
A7.12
A7.13
A7.14
A7.15
A7.16
A7.17
A7.18
A7.19
A7.1
A7.2
A7.3
A7.4
A7.5
A7.6
A7.7
A7.8
A7.9
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