mpc89x515a Megawin Technology, mpc89x515a Datasheet - Page 25

• Manufacturer Part Number: mpc89x515a
• Description: 8-bit Micro-controller
• Manufacturer: Megawin Technology

SFR: WDTCR (Watchdog Timer Control):
ENW: Enable WDT while it is set. ENW cannot be cleared by firmware.
CLRW: Clear WDT to recount while it is set. Hardware will automatically clear this bit.
WIDL: Set this bit to disable WDT generating reset even though the μC is in idle mode.
{PS2, PS1, PS0}: select the pre-scalar output.
Serial IO Port (UART)
The serial port of MPC89x515A is duplex. It can transmit and receive simultaneously. The
receiving and transmitting of the serial port share the same SFR SBUF, but actually there are
two SBUF registers implemented in the chip, one is for transmitting and the other is for
receiving. The serial port can be operated in 4 different modes.
Mode 0
Generally, this mode purely is used to extend the I/O features of this device.
Operating under this mode, the device receives the serial data or transmits the serial data via
pin RXD, while there is a clock stream shifted via pin TXD which makes convenient for
external synchronization. An 8-bit data is serially transmitted/received with LSB first. The baud
rate is fixed at 1/12 the oscillator frequency.
Mode1
A 10-bits data is serially transmitted through TXD or received through RXD. The frame data
includes a start bit (0), 8 data bits and a stop bit (1). After the receiving, the device will keep the
stop bit in RB8 which from SRF SCON.
MEGAWIN
Bit-7
-
1: = enable watchdog timer, 0: = does not use watchdog timer
{1, 1, 1}: = set the pre-scaling value 256
{0, 0, 0}: = set the pre-scaling value 2
{0, 0, 1}: = set the pre-scaling value 4
{0, 1, 0}: = set the pre-scaling value 8
{0, 1, 1}: = set the pre-scaling value 16
{1, 0, 0}: = set the pre-scaling value 32
{1, 0, 1}: = set the pre-scaling value 64
{1, 1, 0}: = set the pre-scaling value 128
Bit-6
Baud Rate (for Mode 1)
-
ENW
Bit-5
or =
MPC89x515A Data Sheet
CLRW
=
Bit-4
(Timer-2 overflow rate)
2
SMOD
32
WIDL
Bit-3
16
X
(Timer-1 overflow rate)
Bit-2
PS2
Bit-1
PS1
Bit-0
PS0
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