mpc8349ea Freescale Semiconductor, Inc, mpc8349ea Datasheet - Page 17

• Manufacturer Part Number: mpc8349ea
• Description: Mpc8349ea Powerquicc
• Manufacturer: Freescale Semiconductor, Inc

Table 17
Table 18
Figure 4
Freescale Semiconductor
At recommended operating conditions with GV
At recommended operating conditions with GV
AC input low voltage
AC input high voltage
Controller Skew for MDQS—MDQ/MECC/MDM
Notes:
1. t
2. The amount of skew that can be tolerated from MDQS to a corrresponding MDQ signal is called t
3. This specification applies only to the DDR interface.
will be captured with MDQS[n]. This should be subtracted from the total timing budget.
determined by the equation: t
value of t
CISKEW
MDQS[n]
MDQ[x]
illustrates the DDR input timing diagram showing the t
provides the input AC timing specifications for the DDR SDRAM when GV
provides the input AC timing specifications for the DDR SDRAM interface.
represents the total amount of skew consumed by the controller between MDQS[n] and any corresponding bit that
CISKEW
MPC8349EA PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 10
MCK[n]
MCK[n]
Parameter
.
Table 17. DDR SDRAM Input AC Timing Specifications for 2.5-V Interface
Parameter
Table 18. DDR and DDR2 SDRAM Input AC Timing Specifications
DISKEW
= ± (T/4 – abs (t
DD
DD
Figure 4. DDR Input Timing Diagram
of 2.5 ± 5%.
of (1.8 or 2.5 V) ± 5%.
400 MHz
333 MHz
266 MHz
200 MHz
t
t
MCK
Symbol
DISKEW
V
V
IH
IL
CISKEW
Symbol
t
CISKEW
)); where T is the clock period and abs (t
MV
D0
REF
Min
—
+ 0.31
–600
–750
–750
–750
Min
D1
DISKEW
t
DISKEW
MV
timing parameter.
REF
Max
—
Max
600
750
750
750
– 0.31
DISKEW
CISKEW
DD
DDR and DDR2 SDRAM
. This can be
(typ) = 2.5 V.
Unit
Unit
ps
) is the absolute
V
V
Notes
Notes
1, 2
—
—
—
—
—
3
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