mc68hc08az60 Freescale Semiconductor, Inc, mc68hc08az60 Datasheet - Page 219

• Manufacturer Part Number: mc68hc08az60
• Description: M68hc08 Family Of 8-bit Microcontroller Units Mcus
• Manufacturer: Freescale Semiconductor, Inc

Transmission
Format When
CPHA = 0
9-spi
MOTOROLA
CAPTURE STROBE
FOR REFERENCE
FROM MASTER
SCK CPOL = 0
SCK CPOL = 1
SCK CYCLE #
FROM SLAVE
SS TO SLAVE
MOSI
MISO
Figure 3
The figure should not be used as a replacement for data sheet
parametric information. Two waveforms are shown for SCK: one for
CPOL = 0 and another for CPOL = 1. The diagram may be interpreted
as a master or slave timing diagram since the serial clock (SCK), master
in/slave out (MISO), and master out/slave in (MOSI) pins are directly
connected between the master and the slave. The MISO signal is the
output from the slave, and the MOSI signal is the output from the master.
The SS line is the slave select input to the slave. The slave SPI drives
its MISO output only when its slave select input (SS) is at logic 0, so that
only the selected slave drives to the master. The SS pin of the master is
not shown but is assumed to be inactive. The SS pin of the master must
be high or must be reconfigured as general-purpose I/O not affecting the
SPI (see
SPSCK edge is the MSB capture strobe. Therefore, the slave must
begin driving its data before the first SPSCK edge, and a falling edge on
the SS pin is used to start the transmission. The SS pin must be toggled
high and then low again between each byte transmitted.
MSB
Figure 3. Transmission Format (CPHA = 0)
Freescale Semiconductor, Inc.
MSB
1
For More Information On This Product,
Serial Peripheral Interface Module (SPI)
Mode Fault Error
shows an SPI transmission in which CPHA (SPCR) is logic 0.
BIT 6
BIT 6
2
Go to: www.freescale.com
BIT 5
BIT 5
3
BIT 4
BIT 4
4
on page 225). When CPHA = 0, the first
BIT 3
BIT 3
5
Serial Peripheral Interface Module (SPI)
BIT 2
BIT 2
6
MC68HC08AZ60 — Rev 1.0
BIT 1
BIT 1
7
Transmission Formats
LSB
LSB
8
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