mc68hc08az60 Freescale Semiconductor, Inc, mc68hc08az60 Datasheet - Page 137

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mc68hc08az60

Manufacturer Part Number
mc68hc08az60
Description
M68hc08 Family Of 8-bit Microcontroller Units Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Flag Protection
During Break
Interrupts
CPU During Break
Interrupts
3-brk
MOTOROLA
Break Status and Control Register
Break Address Register High
Break Address Register Low
Register Name
(BRKH)
(BSCR)
(BRKL)
The BCFE bit in the break flag control register (BFCR) enables software
to clear status bits during the break state.
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC:$FFFD ($FEFC:$FEFD
in monitor mode)
Figure 2. I/O Register Summary
Bit 7
BRKE
Bit 15
Bit 7
0
0
0
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Table 1. I/O Register Address Summary
= Unimplemented
BRKA
Register
Address
14
6
0
6
0
0
Break Module
13
5
0
5
0
0
0
$FE0C
BRKH
R = Reserved
12
4
0
4
0
0
0
$FE0D
BRKL
11
3
0
3
0
0
0
MC68HC08AZ60 — Rev 1.0
$FE0E
BSCR
10
2
0
2
0
0
0
Functional Description
1
9
0
1
0
0
0
Break Module
Bit 0
Bit 8
Bit 0
0
0
0
0
137

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