mc68hc08az60 Freescale Semiconductor, Inc, mc68hc08az60 Datasheet - Page 100

• Manufacturer Part Number: mc68hc08az60
• Description: M68hc08 Family Of 8-bit Microcontroller Units Mcus
• Manufacturer: Freescale Semiconductor, Inc

System Integration Module (SIM)
Stop Mode
MC68HC08AZ60 — Rev 1.0
100
NOTE:
In stop mode, the SIM counter is reset and the system clocks are
disabled. An interrupt request from a module can cause an exit from stop
mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the clock generator module outputs (CGMOUT and
CGMXCLK) in stop mode, stopping the CPU and peripherals. Stop
recovery time is selectable using the SSREC bit in the mask option
register (MOR). If SSREC is set, stop recovery is reduced from the
normal delay of 4096 CGMXCLK cycles down to 32. This is ideal for
applications using canned oscillators that do not require long startup
times from stop mode.
External crystal applications should use the full stop recovery time by
clearing the SSREC bit.
A break interrupt during stop mode sets the SIM break stop/wait bit
(SBSW) in the SIM break status register (SBSR).
The SIM counter is held in reset from the execution of the STOP
instruction until the beginning of stop recovery. It is then used to time the
recovery period.
Freescale Semiconductor, Inc.
CPUSTOP
NOTE: Previous data can be operand data or the STOP opcode, depending on the last
For More Information On This Product,
R/W
IDB
IAB
instruction
System Integration Module (SIM)
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STOP ADDR
.
Figure 15
Figure 15. Stop Mode Entry Timing
PREVIOUS DATA
shows stop mode entry timing.
STOP ADDR + 1
NEXT OPCODE
SAME
SAME
SAME
MOTOROLA
SAME
18-sim