mc68hc08az60 Freescale Semiconductor, Inc, mc68hc08az60 Datasheet - Page 130

• Manufacturer Part Number: mc68hc08az60
• Description: M68hc08 Family Of 8-bit Microcontroller Units Mcus
• Manufacturer: Freescale Semiconductor, Inc

Clock Generator Module (CGM)
MC68HC08AZ60 — Rev 1.0
130
The K factor in the equations is derived from internal PLL parameters.
K
K
Acquisition and Tracking Modes
Note the inverse proportionality between the lock time and the reference
frequency.
In automatic bandwidth control mode, the acquisition and lock times are
quantized into units based on the reference frequency. (See
and Automatic PLL Bandwidth Modes
number of clock cycles, n
within the tracking mode entry tolerance,
mode. A certain number of clock cycles, n
that the PLL is within the lock mode entry tolerance,
acquisition time, t
acquisition to lock time, t
since the average frequency over the entire measurement period must
be within the specified tolerance, the total time usually is longer than
t
In manual mode, it is usually necessary to wait considerably longer than
t
on page 115), because the factors described in
on Reaction Time
Lock
Lock
acq
trk
Freescale Semiconductor, Inc.
is the K factor when the PLL is configured in tracking mode. (See
For More Information On This Product,
is the K factor when the PLL is configured in acquisition mode, and
as calculated above.
before selecting the PLL clock (see
Clock Generator Module (CGM)
Go to: www.freescale.com
ACQ
on page 128, may slow the lock time considerably.
, is an integer multiple of n
t
acq
t
AL
al
ACQ
t
Lock
, is an integer multiple of n
=
=
, is required to ascertain that the PLL is
=
V
----------- -
f
V
----------- -
f
RDV
RDV
DDA
DDA
t
on page 111).
ACQ
----------- -
K
+
------------ -
K
Base Clock Selector Circuit
on page 111). A certain
TRK
TRK
TRK
4
t
ACQ
8
AL
, before exiting acquisition
, is required to ascertain
Parametric Influences
ACQ
/f
Lock
RDV
TRK
. Therefore, the
, and the
/f
RDV
MOTOROLA
Manual
. Also,
26-cgm