mc68hc908gr8vp Freescale Semiconductor, Inc, mc68hc908gr8vp Datasheet - Page 200

• Manufacturer Part Number: mc68hc908gr8vp
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

System Integration Module (SIM)
Figure 19-16
19.6.2 Stop Mode
In stop mode, the SIM counter is reset and the system clocks are disabled. An interrupt request from a
module can cause an exit from stop mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the clock generator module outputs (CGMOUT and CGMXCLK) in stop mode, stopping
the CPU and peripherals. Stop recovery time is selectable using the SSREC bit in the CONFIG register
(MOR). If SSREC is set, stop recovery is reduced from the normal delay of 4096 CGMXCLK cycles down
to 32. This is ideal for applications using canned oscillators that do not require long startup times from
stop mode.
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
200
and
EXITSTOPWAIT
Note: EXITSTOPWAIT = RST pin, CPU interrupt, or break interrupt
External crystal applications should use the full stop recovery time by
clearing the SSREC bit unless the OSCSTOPENB bit is set in the
configuration register.
To minimize stop current, all pins configured as inputs should be driven to
a 1 or 0.
CGMXCLK
Figure 19-17
RST
IDB
IAB
IDB
IAB
Figure 19-16. Wait Recovery from Interrupt or Break
$A6
Figure 19-17. Wait Recovery from Internal Reset
$A6
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
$6E0B
$A6
show the timing for WAIT recovery.
$6E0B
$A6
$A6
$A6
CYCLES
$6E0C
32
NOTE
NOTE
$01
Figure 19-18
$00FF
CYCLES
32
$0B
$00FE
$6E
shows stop mode entry timing.
RST VCT H RST VCT L
$00FD
$00FC
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