mc68hc908gr8vp Freescale Semiconductor, Inc, mc68hc908gr8vp Datasheet - Page 149

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mc68hc908gr8vp

Manufacturer Part Number
mc68hc908gr8vp
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.3.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is an input or an output. Writing a 1
to a DDRB bit enables the output buffer for the corresponding port B pin; a 0 disables the output buffer.
DDRB5–DDRB0 — Data Direction Register B Bits
Figure 16-8
When bit DDRBx is a 1, reading address $0001 reads the PTBx data latch. When bit DDRBx is a 0,
reading address $0001 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Freescale Semiconductor
These read/write bits control port B data direction. Reset clears DDRB5–DDRB0], configuring all port
B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
shows the port B I/O logic.
Address:
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
For those devices packaged in a 28-pin DIP and SOIC package, PTB5,4
are not connected. Set DDRB5,4 to a 1 to configure PTB5,4 as outputs.
Reset:
Read:
Write:
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PTB ($0001)
READ PTB ($0001)
$0005
Bit 7
0
0
Figure 16-7. Data Direction Register B (DDRB)
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
= Unimplemented
6
0
0
RESET
Figure 16-8. Port B I/O Circuit
DDRB5
5
0
Table 16-3
NOTE
NOTE
DDRBx
DDRB4
PTBx
4
0
summarizes the operation of the port B pins.
DDRB3
3
0
DDRB2
2
0
DDRB1
1
0
DDRB0
Bit 0
PTBx
0
Port B
149

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