mc68hc908gr8vp Freescale Semiconductor, Inc, mc68hc908gr8vp Datasheet - Page 147

• Manufacturer Part Number: mc68hc908gr8vp
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

When bit DDRAx is a 1, reading address $0000 reads the PTAx data latch. When bit DDRAx is a 0,
reading address $0000 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
16.2.3 Port A Input Pullup Enable Register
The port A input pullup enable register (PTAPUE) contains a software configurable pullup device for each
of the four port A pins. Each bit is individually configurable and requires that the data direction register,
DDRA, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRA is configured for output mode.
Freescale Semiconductor
PTAPUE Bit
NOTES:
1. X = Don’t care
2. Hi-Z = High impedance
3. Writing affects data register, but does not affect input.
4. I/O pin pulled up to V
X
1
0
DDRA Bit
0
0
1
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
DD
by internal pullup device
PTA Bit
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
X
X
X
(1)
Table 16-2. Port A Pin Functions
RESET
Figure 16-4. Port A I/O Circuit
I/O Pin Mode
Input, V
Input, Hi-Z
Output
DD
Table 16-2
(4)
(2)
DDRAx
PTAx
Accesses to DDRA
DDRA3–DDRA0
DDRA3–DDRA0
DDRA3–DDRA0
summarizes the operation of the port A pins.
Read/Write
PTAPUEx
PTA3–PTA0
Read
Pin
Pin
V
DD
Accesses to PTA
INTERNAL
PULLUP
DEVICE
PTAx
PTA3–PTA0
PTA3–PTA0
PTA3–PTA0
Write
Port A
(3)
(3)
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