kad5514p Kenet Inc., kad5514p Datasheet - Page 8

• Manufacturer Part Number: kad5514p
• Description: 14-bit, 250/210/170/125msps Adc
• Manufacturer: Kenet Inc.

Pin Descriptions—72QFN
LVCMOS Output Mode Functionality is shown in brackets (NC = No Connection)
Pin #
1, 6, 12, 19, 24, 71
2-5, 13, 14, 17, 18
7, 8, 11, 72
9, 10
15
16
20, 21
22
23
25
26, 45, 55, 65
27, 36, 56
28, 29
30, 31
32, 33
34, 35
37, 38
39, 40
41, 42
43, 44
46
47, 48
49, 50
51, 52
53, 54
57, 58
59, 60
61, 62
63, 64
66
67
68
69
70
Exposed Paddle
KAD5514P
LVDS [LVCMOS] Name
AVDD
DNC
AVSS
VINN, VINP
VCM
CLKDIV
CLKP, CLKN
OUTMODE
NAPSLP
RESETN
OVSS
OVDD
D0N, D0P [NC, D0]
D1N, D1P [NC, D1]
D2N, D2P [NC, D2]
D3N, D3P [NC, D3]
D4N, D4P [NC, D4]
D5N, D5P [NC, D5]
D6N, D6P [NC, D6]
D7N, D7P [NC, D7]
RLVDS
CLKOUTN, CLKOUTP [NC, CLKOUT]
D8N, D8P [NC, D8]
D9N, D9P [NC, D9]
D10N, D10P [NC, D10]
D11N, D11P [NC, D11]
D12N, D12P [NC, D12]
D13N, D13P [NC, D13]
ORN, ORP [NC, OR]
SDO
CSB
SCLK
SDIO
OUTFMT
AVSS
Preliminary
LVDS [LVCMOS] Function
1.8V Analog Supply
Do Not Connect
Analog Ground
Analog Input Negative, Positive
Common Mode Output
Clock Divider Control
Clock Input True, Complement
Output Mode (LVDS, LVCMOS)
Power Control (Nap, Sleep modes)
Power On Reset (Active Low)
Output Ground
1.8V Output Supply
LVDS Bit 0 (LSB) Output Complement, True [NC, LVCMOS Bit 0]
LVDS Bit 1 Output Complement, True [NC, LVCMOS Bit 1]
LVDS Bit 2 Output Complement, True [NC, LVCMOS Bit 2]
LVDS Bit 3 Output Complement, True [NC, LVCMOS Bit 3]
LVDS Bit 4 Output Complement, True [NC, LVCMOS Bit 4]
LVDS Bit 5 Output Complement, True [NC, LVCMOS Bit 5]
LVDS Bit 6 Output Complement, True [NC, LVCMOS Bit 6]
LVDS Bit 7 Output Complement, True [NC, LVCMOS Bit 7]
LVDS Bias Resistor
LVDS Clock Output Complement, True [NC, LVCMOS CLKOUT]
LVDS Bit 8 Output Complement, True [NC, LVCMOS Bit 8]
LVDS Bit 9 Output Complement, True [NC, LVCMOS Bit 9]
LVDS Bit 10 Output Complement, True [NC, LVCMOS Bit 10]
LVDS Bit 11Output Complement, True [NC, LVCMOS Bit 11]
LVDS Bit 12 Output Complement, True [NC, LVCMOS Bit 12]
LVDS Bit 13 (MSB) Output Complement, True [NC, LVCMOS Bit 13]
LVDS Over Range Complement, True [NC, LVCMOS Over Range]
SPI Serial Data Output (4.7kΩ pull-up to OVDD is required)
SPI Chip Select (active low)
SPI Clock
SPI Serial Data Input/Output
Output Data Format (Two’s Comp., Gray Code, Offset Binary)
Analog Ground
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