tda8035hn NXP Semiconductors, tda8035hn Datasheet - Page 12

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tda8035hn

Manufacturer Part Number
tda8035hn
Description
Smart Card Interface
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
TDA8035HN
Product data sheet
8.5 CS control
8.6 Shutdown mode and Deep Shutdown mode
The CS (Chip Select) input allows multiple devices to operate in parallel. When CS is
high, the system interface signals operate as described. When CS is low , the signals
CMDVCCN, RSTIN, CLKDIV1, CLKDIV2, EN5V/3VN and EN1V8N are latched. I/OUC,
AUX1UC and AUX2UC are set to high impedance pull up mode and won’t pass data to or
from the smart card. OFFN output is tri-stated.
After power-on reset, the circuit enters the Shutdown mode if CMDVCCN input pin is to a
logic-High. A minimum number of circuits are active while waiting for the micro-controller
to start a session.
A Deep Shutdown mode can be entered by forcing CMDVCCN input pin to a logic-High
state and EN5V/3VN, EN1V8N input pins to a logic-Low state. Deep Shutdown mode can
only be entered when the smart card reader is inactive. In Deep Shutdown mode, all
circuits are disabled. The OFFN pin follows the status of PRESN pin. To exit Deep
Shutdown mode, change the state of one or more of the three control pins.
shows the control sequence for entering and exiting.
1. All card contacts are inactive (approximately 200 Ω to GND).
2. I/OUC, AUX1UC and AUX2UC are high impedance (10 k pull-up resistor connected
3. Voltage generators are stopped.
4. Voltage supervisor is active.
5. The internal oscillator runs at its low frequency.
Fig 7.
to V
(internal pin)
CMDVCCN
EN5V/3VN
EN1V8N
PRESN
DDI
OFFN
Mode
Shutdown mode and Deep Shutdown mode
VCC
).
Shutdown
DEACTIVATION
SEQUENCE
All information provided in this document is subject to legal disclaimers.
Activation
Rev. 1.0 — 19 April 2011
Shutdown
Deep Shutdown
Shutdown
debounce
TDA8035HN
Smart card interface
© NXP B.V. 2011. All rights reserved.
Figure 8
Activation
001aan751
12 of 32

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