tda8029hl-c207 NXP Semiconductors, tda8029hl-c207 Datasheet - Page 7

• Manufacturer Part Number: tda8029hl-c207
• Description: Low Power Single Card Reader
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 14145
Product data sheet
The external interrupt INT0_N is used by the ISO UART, by the analog drivers and the
ETU counters. It must be left open in the application.
The second external interrupt INT1_N is available for the application.
A general description as well as added features are described in this chapter.
The added features to the 80C51 controller are similar to the 8XC51FB controller, except
on the wake-up from Power-down mode, which is possible by a falling edge on INT0_N
(Internally driven signalling card reader problems, see details in
INT1_N or on RX due to the addition of an extra delay counter and enable configuration
bits within register UCR2 (see detailed description in
information please refer to the published specification of the 8XC51FB in “Data Handbook
IC20; 80C51-Based 8-bit Microcontrollers” .
The controller has four 8-bit I/O ports, three 16-bit timer/event counters, a multi-source,
four-priority-level, nested interrupt structure, an enhanced UART and on-chip oscillator
and timing circuits. For systems that require extra memory capability up to 64 kB, it can be
expanded using standard TTL-compatible memories and logic.
Additional features of the controller are:
Table 4
between a standard 80C51, an 8XC51FB and the embedded controller in the TDA8029.
Table 4:
Feature
ROM
RAM
ERAM (MOVX)
PCA
•
•
•
•
•
•
•
•
•
•
•
•
•
80C51 central processing unit
Full static operation
Security bits: ROM - 2 bits
Encryption array of 64 bits
4-level priority structure
6 interrupt sources
Full-duplex enhanced UART with framing error detection and automatic address
recognition
Power control modes; clock can be stopped and resumed, Idle mode and Power-down
mode
Wake-up from power-down by falling edge on INT0_N, INT1_N and RX with an
embedded delay counter
Programmable clock out
Second DPTR register
Asynchronous port reset
Low EMI by inhibit ALE.
gives a list of main features to get a better understanding of the differences
Principal blocks in 80C51, 8XC51FB and TDA8029
80C51
4 kB
128 byte
no
no
Rev. 03 — 22 February 2005
8XC51FB
16 kB
256 byte
256 byte
yes
Section
Low power single card reader
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
8.10.3.2). For any further
Section
TDA8029
16 kB
256 byte
512 byte
no
TDA8029
8.10.1.2), on
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