tda8029hl-c207 NXP Semiconductors, tda8029hl-c207 Datasheet - Page 25
tda8029hl-c207
Manufacturer Part Number
tda8029hl-c207
Description
Low Power Single Card Reader
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8029HL-C207.pdf
(59 pages)
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Philips Semiconductors
9397 750 14145
Product data sheet
8.6.1 Auxiliary register (AUXR)
locations higher than 1FFh (i.e., 0200h to FFFFh) will be performed with the MOVX DPTR
instructions in the same way as in the standard 80C51, so with P0 and P2 as
data/address bus, and P3.6 and P3.7 as write and read timing signals.
When EXTRAM = 1, MOVX @Ri and MOVX @DPTR will be similar to the standard
80C51. MOVX @Ri will provide an 8-bit address multiplexed with data on port 0 and any
output port pins can be used to output higher order address bits. This is to provide the
external paging capability. MOVX @DPTR will generate a 16-bit address. Port 2 outputs
the high order eight address bits (the contents of DPH) while port 0 multiplexes the
low-order eight address bits (DPL) with data. MOVX @Ri and MOVX @DPTR will
generate either read or write signals on P3.6 (WR) and P3.7 (RD).
The stack pointer (SP) may be located anywhere in the 256 byte RAM (lower and upper
RAM) internal data memory. The stack must not be located in the XRAM.
Table 32:
Fig 9. Internal and external data memory address space with EXTRAM = 0
7
-
1FFh
AUXR - auxiliary register (address 8Eh) bit allocation
00h
6
-
512-BYTE
MOVX
XRAM
BY
Rev. 03 — 22 February 2005
5
-
FFh
80h
00h
INTERNAL
INTERNAL
128-BYTE
128-BYTE
LOWER
UPPER
RAM
RAM
4
-
FFh
80h
00h
3
-
REGISTERS
FUNCTION
SPECIAL
Low power single card reader
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
2
-
FFFFh
200h
00h
EXTRAM
EXTERNAL
TDA8029
MEMORY
DATA
1
mce651
AO
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