mm74c165 Fairchild Semiconductor, mm74c165 Datasheet
mm74c165
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mm74c165 Summary of contents
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... MM74C165 Parallel-Load 8-Bit Shift Register General Description The MM74C165 functions as an 8-bit parallel-load, serial shift register. Data is loaded into the register independent of the state of the clock(s) when PARALLEL LOAD (PL) is low. Shifting is inhibited as long low. Data is sequentially shifted from complementary outputs highest-order bit (P7) first ...
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Block Diagrams *Please look into Section 8, Appendix D for availability of various package types. Truth Table State PL Clock1 Parallel Load L X Enable H L Shift (with Ds) H Shift (with Ds) H Hold (Disable Don’t ...
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Absolute Maximum Ratings Voltage at Any Pin 0. Operating Temperature Range Storage Temperature Range Absolute Maximum V CC Power Dissipation Dual-In-Line Small Outline DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted Symbol Parameter CMOS ...
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AC Electrical Characteristics pF, unless otherwise noted A L Symbol Parameter Propagation Delay Time to a Logical “0” or pd0 pd1 Logical “1” from Clock or Load ...
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Logic Waveform 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL ...