ics1893cy-10 Integrated Device Technology, ics1893cy-10 Datasheet - Page 130

• Manufacturer Part Number: ics1893cy-10
• Description: 3.3-v 10base-t/100base-tx Integrated Phyceiver
• Manufacturer: Integrated Device Technology

9.5.13 100M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)
ICS1893CY-10 Rev 1/07
Table 9-20
half-duplex transmission. The time periods consist of timings of signals on the following pins:
•
•
•
Figure 9-14
Table 9-20. 100M MII Carrier Assertion/De-Assertion (Half-Duplex Transmission Only)
Figure 9-14. 100M MII Carrier Assertion/De-Assertion Timing Diagram
TXEN
TXCLK
CRS
Period
Time
TXEN
TXCLK
CRS
t1
t2
ICS1893CY-10 - Release
TXEN Sampled Asserted to CRS Assert
TXEN De-Asserted to CRS De-Asserted
lists the significant time periods for the 100M MII carrier assertion/de-assertion during
shows the timing diagram for the time periods.
(Half-Duplex Transmission Only)
t1
Copyright © 2007, Integrated Device Technology, Inc.
Parameter
All rights reserved.
131
t2
Chapter 9 DC and AC Operating Conditions
Condi-
tions
Min.
0
0
Typ.
3
3
Max.
4
4
Bit times
Bit times
Units