ics1893cy-10 Integrated Device Technology, ics1893cy-10 Datasheet - Page 125
ics1893cy-10
Manufacturer Part Number
ics1893cy-10
Description
3.3-v 10base-t/100base-tx Integrated Phyceiver
Manufacturer
Integrated Device Technology
Datasheet
1.ICS1893CY-10.pdf
(143 pages)
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9.5.8 10M Serial Interface: Receive Latency
ICS1893CY-10 Rev 1/07
10RCLK
TP_RX
10RD
Table 9-15
timings of signals on the following pins:
•
•
•
Figure 9-9
Table 9-15. 10M Serial Interface Receive Latency Timing
Figure 9-9. 10M Serial Interface Receive Latency Timing
Period
Time
TP_RX (the MDI mapping of the 10M/100M MII TP_RXP and TP_RXN pins)
10RCLK (the 10M Serial Interface mapping of the 10M/100M MII RXCLK pins)
10RD (the 10M Serial Interface mapping of the 10M/100M MII RXD0 pins)
t1
ICS1893CY-10 Data Sheet - Release
TP_RX Input to 10RD Delay
shows the timing diagram for the time periods.
lists the significant time periods for the 10M Serial Interface timing. The time periods consist of
Parameter
Copyright © 2007, Integrated Device Technology, Inc.
Bit A
All rights reserved.
126
10M Serial Interface
Bit B
Conditions
t1
Chapter 9 DC and AC Operating Conditions
Min.
–
Bit A
Typ.
3.6
Max.
Bit B
4
Bit times
Units
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