ics1893cy-10 Integrated Device Technology, ics1893cy-10 Datasheet - Page 128
ics1893cy-10
Manufacturer Part Number
ics1893cy-10
Description
3.3-v 10base-t/100base-tx Integrated Phyceiver
Manufacturer
Integrated Device Technology
Datasheet
1.ICS1893CY-10.pdf
(143 pages)
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9.5.11 10M Media Independent Interface: Transmit Latency
ICS1893CY-10 Rev 1/07
TXEN
TXCLK
TXD
TP_TX
†
encoding is
not shown.
Manchester
Table 9-18
timings of signals on the following pins:
•
•
•
•
Figure 9-12
Table 9-18. 10M MII Transmit Latency Timing
Figure 9-12. 10M MII Transmit Latency Timing Diagram
†
Period
Time
TXEN
TXCLK
TXD (that is, TXD[3:0])
TP_TX (that is, TP_TXP and TP_TXN)
ICS1893CY-10 - Release
t1
TXD Sampled to MDI Output of First Bit
lists the significant time periods for the 10M MII transmit latency. The time periods consist of
shows the timing diagram for the time periods.
5
Parameter
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
t1
129
5
10M MII
Conditions
Chapter 9 DC and AC Operating Conditions
Min.
–
Typ.
1.2
5
Max.
2
Bit times
Units
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