ics1893cy-10 Integrated Device Technology, ics1893cy-10 Datasheet - Page 126
ics1893cy-10
Manufacturer Part Number
ics1893cy-10
Description
3.3-v 10base-t/100base-tx Integrated Phyceiver
Manufacturer
Integrated Device Technology
Datasheet
1.ICS1893CY-10.pdf
(143 pages)
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9.5.9 10M Media Independent Interface: Receive Latency
ICS1893CY-10 Rev 1/07
†
is not shown.
TP_RX
RXCLK
RXD
Manchester encoding
Table 9-16
signals on the following pins:
•
•
•
Figure 9-10
Table 9-16. 10M MII Receive Latency
Figure 9-10. 10M MII Receive Latency Timing Diagram
Period
Time
TP_RX (that is, the MII TP_RXP and TP_RXN pins)
RXCLK
RXD
ICS1893CY-10 - Release
t1
†
First Bit of /5/ on TP_RX to /5/D/ on RXD
lists the significant time periods for the 10M MII timing. The time periods consist of timings of
shows the timing diagram for the time periods.
5
Parameter
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
127
5
t1
10M MII
Conditions
Chapter 9 DC and AC Operating Conditions
Min.
–
5
Typ.
6.5
Max.
7
Bit times
Units
D
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