mt48h16m32lfcm-75-it Micron Semiconductor Products, mt48h16m32lfcm-75-it Datasheet - Page 68
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mt48h16m32lfcm-75-it
Manufacturer Part Number
mt48h16m32lfcm-75-it
Description
512mb 32 Meg X 16, 16 Meg X 32 Mobile Sdram Features
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT48H16M32LFCM-75-IT.pdf
(75 pages)
- Current page: 68 of 75
- Download datasheet (2Mb)
Figure 48:
Self Refresh
PDF: 09005aef82ea3742/Source: 09005aef82ea3752
sdr_mobile_sdram_cmd_op_timing_dia_fr4.08__4.fm - Rev. B 4/08 EN
BA0, BA1
Command
Address
DQM
A10
CKE
CLK
DQ
Precharge all
High-Z
Auto Refresh Mode
t CKS
active banks
t CMS
t AS
Single bank
PRECHARGE
All banks
Bank(s)
T0
Notes:
t AH
t CKH
t CMH
t CK
1. Back-to-back AUTO REFRESH commands are not required.
The self refresh mode can be used to retain data in the SDRAM, even if the rest of the
system is powered down. When in self refresh mode, the SDRAM retains data without
external clocking. The SELF REFRESH command is initiated like an AUTO REFRESH
command, except CKE is disabled (LOW). After the SELF REFRESH command is regis-
tered, all the inputs to the SDRAM become “Don’t Care” with the exception of CKE,
which must remain LOW.
After self refresh mode is engaged, the SDRAM provides its own internal clocking,
causing it to perform its own AUTO REFRESH cycles. The SDRAM must remain in self
refresh mode for a minimum period equal to
for an indefinite period beyond that.
t RP
T1
NOP
T2
REFRESH
AUTO
t CH
t RFC
NOP
68
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CL
Tn + 1
REFRESH
t
AUTO
RAS and may remain in self refresh mode
t RFC
NOP
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NOP
©2007 Micron Technology, Inc. All rights reserved.
SDR Mobile SDRAM
To + 1
ACTIVE
Row
Row
Bank
Operations
Don’t Care
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