mt48h16m32lfcm-75-it Micron Semiconductor Products, mt48h16m32lfcm-75-it Datasheet - Page 59
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mt48h16m32lfcm-75-it
Manufacturer Part Number
mt48h16m32lfcm-75-it
Description
512mb 32 Meg X 16, 16 Meg X 32 Mobile Sdram Features
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT48H16M32LFCM-75-IT.pdf
(75 pages)
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Figure 37:
Figure 38:
PDF: 09005aef82ea3742/Source: 09005aef82ea3752
sdr_mobile_sdram_cmd_op_timing_dia_fr4.08__4.fm - Rev. B 4/08 EN
Command
BA0, BA1
Address
DQM
CKE
CLK
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
Bank
Internal
States
Row
Row
READ with Auto Precharge Interrupted by a WRITE
READ with Auto Precharge
t CMH
t AH
t AH
t AH
t CKH
t RCD
t RAS
t RC
Notes:
Notes:
t CK
Command
Address
Bank m
T1
Bank n
NOP
DQM
CLK
1. DQM is HIGH at T2 to prevent D
1. For this example, BL = 4 and CL = 2.
DQ
1
Enable auto precharge
Active
Page
t CMS
t CL
READ - AP
Bank n,
BANK n
Column m
Col a
T0
T2
Bank
READ
READ with burst of 4
t CH
t CMH
CL = 2
Page active
T1
NOP
CL = 3 (bank n)
T3
NOP
t LZ
t AC
T2
NOP
59
T4
D
NOP
OUT
T3
t OH
OUT
D
NOP
m
OUT
a
t AC
a + 1 from contending with D
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WRITE - AP
Bank m,
D
Col d
BANK m
T5
OUT
T4
NOP
D
d
IN
Interrupt burst, precharge
t OH
m + 1
WRITE with Burst of 4
t AC
T5
d + 1
NOP
D
D
IN
T6
OUT
NOP
t
RP - Bank n
t OH
m + 2
t RP
t AC
T6
d + 2
NOP
D
IN
©2007 Micron Technology, Inc. All rights reserved.
SDR Mobile SDRAM
D
IN
T7
OUT
NOP
Don’t Care
Don’t Care
t OH
d at T4.
m + 3
t HZ
T7
t WR - Bank m
d + 3
NOP
D
IN
Write-back
Idle
Operations
ACTIVE
T8
Bank
Row
Row
Undefined
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