mma1605nwr2 Freescale Semiconductor, Inc, mma1605nwr2 Datasheet - Page 4

• Manufacturer Part Number: mma1605nwr2
• Description: Dsi Inertial Sensor
• Manufacturer: Freescale Semiconductor, Inc

Table 1. Pin Description
4
1
MMA16xxNW
Pin
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
8
9
BUSRTN
Name
TEST2
TEST3
TEST1
BUSIN
TEST4
TEST5
TEST6
TEST7
C
VSSB
HCAP
VSSA
C
PCM
PAD
Pin
V
REGA
Pin Connections
REG
SS
Formal Name
Hold Capacitor
Die Attach Pad
Analog GND
Digital GND
Test Pin
Test Pin
Test Pin
Test Pin
Test Pin
Test Pin
Test Pin
Supply /
Ground
Ground
Output
Comm
Supply
Analog
Supply
Digital
PCM
This pin must be left unconnected in the application.
This pin must be grounded in the application.
This pin must be grounded in the application.
This pin is the common return for power and signalling.
This pin provides a 4 MHz PCM signal proportional to the acceleration data for test purposes. The output can be enabled or
This pin must be grounded in the application.
This pin is connected to the DSI positive bus node & provides the power supply & communication to the system master. An
This pin rectifies the supply voltage on the BUSIN pin to create the supply voltage for the device. An external capacitor must
This pin is connected to the power supply for the internal digital circuitry. An external capacitor must be connected between
This pin must be grounded in the application.
This pin is connected to the power supply for the internal analog circuitry. An external capacitor must be connected between
This pin is the power supply return node for analog circuitry.
This pin enables test mode, and provides the SPI programming voltage in test mode. This pin is must be grounded in the
This pin must be grounded in the application.
This pin must be grounded in the application.
This pin is the power supply return node for the digital circuitry.
This pin is the die attach flag, & should be connected to VSS in the application. Reference
disabled via OTP. If unused, this pin must be left unconnected in the application. Reference
external capacitor must be connected to between this pin and the BUSRTN pin. Reference
be connected between this pin and the BUSRTN pin to store energy for operation during master communication signalling.
Reference
this pin and V
this pin and V
application.
BUSRTN
Figure
TEST2
TEST3
TEST1
SS
SSA
. Reference
. Reference
1.
1
2
3
4
Figure 4. Block Diagram
Figure
Figure
16 15 14 13
5
17
1.
1.
6
7
8
12
10
11
9
Definition
V
C
TEST4
C
SSA
REGA
REG
Section
Figure
Freescale Semiconductor
Section
1.
5.
3.5.3.6.
Sensors