mma1605nwr2 Freescale Semiconductor, Inc, mma1605nwr2 Datasheet - Page 39

• Manufacturer Part Number: mma1605nwr2
• Description: Dsi Inertial Sensor
• Manufacturer: Freescale Semiconductor, Inc

registers are used. If the Format Selection register contains ‘1111’, the Format Control register values are active. Any write to the
Format Control registers will become active upon completion of the write. In this case, the response to a Format Control Com-
mand will maintain the format of the previous command resulting in an invalid response.
4.2.1.12
the DSI Global Device Address of ‘0000’.
dresses are shown in
Table 46. Read Register Data Command Bit Definitions
Table 48. Read Register Data Response Bit Definitions
Sensors
Freescale Semiconductor
Table 45. Read Register Data Command
Table 47. Long Response - Read Register Data Command
D[15]
D[7]
A[3]
The contents of the Format Selection register determine whether the standard DSI values or the values in the format control
A write of ‘0000’ to the Format Selection register activates the standard DSI values.
A write to the Format Selection register of any other value is ignored.
The Read Register Data command is supported in the following command formats:
The device ignores the Register Data command if the command is in any other format, or if the DSI device address is set to
The read register command uses the byte address definitions shown in
0
Bit Field
Bit Field
RA[3:0]
RA[3:0]
RD7:0]
C[3:0]
A[3:0]
A[3:0]
D[14]
D[6]
A[2]
0
• Standard Long Command
• Enhanced Long Command as configured by the Format Control Command (Reference
Read Register Data Command
D[13]
D[5]
A[1]
0
Read Register Data Command = ‘1011’
DSI device address. This field contains the device address. This field must match the internal programmed address field. Otherwise, the
command is ignored.
RA[3:0] contains the byte address of the register to be read.
RD[7:0] contains the data of the register addressed by RA[3:0].
RA[3:0] contains the byte address of the register to be read.
DSI device address. This field contains the device address. This field must match the internal programmed address field. Otherwise, the
command is ignored.
Table
D[12]
D[4]
A[0]
0
Data
2.
D[11]
RA[3]
RA[3]
D[3]
D[10]
RA[2]
RA[2]
D[2]
RA[1]
RA[1]
D[1]
D[9]
RA[0]
RA[0]
D[0]
D[8]
Data
RD[7]
A[3]
D[7]
A[3]
RD[6]
A[2]
D[6]
A[2]
Definition
Definition
Address
Table
RD[5]
A[1]
D[5]
A[1]
2. Readable registers along with their Byte ad-
RD[4]
A[0]
D[4]
A[0]
RD[3]
C[3]
D[3]
1
RD[2]
C[2]
D[2]
Command
0
Section
RD[1]
C[1]
D[1]
1
RD[0]
4.2.1.11)
C[0]
D[0]
1
MMA16xxNW
0 to 8 bits
0 to 8 bits
CRC
CRC
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