mma1605nwr2 Freescale Semiconductor, Inc, mma1605nwr2 Datasheet - Page 29

• Manufacturer Part Number: mma1605nwr2
• Description: Dsi Inertial Sensor
• Manufacturer: Freescale Semiconductor, Inc

Table 11. DSI Bus Command Summary
4
4.1
4.1.1
4.1.2
the DSI data link layer features supported.
4.2
4.2.1
The device will ignore commands of any other format. If a CRC error is detected, or a reserved or un-implemented command is
received, the device will not respond.
aration times defined in
ready for the next message. The device will respond as appropriate during the subsequent DSI transfer. Exactly one response
is attempted.
Sensors
Freescale Semiconductor
C3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
The device is compatible with the DSI Bus Standard V2.5.
Reference DSI Bus Standard V2.5, Section 3 for information regarding the physical layer.
Reference DSI Bus Standard,V2.5, Section 4 for information regarding the DSI data link layer. The sections below describe
DSI Bus Commands are summarized in
Following all messages, the device requires a minimum inter-frame separation (t
C2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
DSI Protocol layer
Communication Interface Overview
DSI Physical Layer
DSI Data Link Layer
DSI Protocol
DSI Bus Commands
C1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
C0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Command
Hex
$A
$B
$C
$D
$E
$0
$1
$2
$3
$4
$5
$6
$7
$8
$9
$F
Section 4.2.1
Initialization
Request Status
Read Acceleration Data
Not Implemented
Request ID Information
Not Implemented
Not Implemented
Clear
Not Implemented
Read Write NVM
Format Control
Read Register Data
Disable Self-Test
Activate Self-Test
Not Implemented
Reverse Initialization
Description
are met, all supported commands are guaranteed to be executed, and the device will be
Table
Standard/Enhanced L/S
Standard/Enhanced L/S
Standard/Enhanced L/S
Standard/Enhanced L/S
Standard/Enhanced L/S
Standard/Enhanced L/S
11. The device supports only the command formats specified in
Standard/Enhanced L
Standard/Enhanced L
Standard/Enhanced L
Command Format
Standard Long Only
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Not Implemented
WA[3]
R/W
NV
D7
⎯
⎯
⎯
⎯
⎯
⎯
0
WA[2]
FA[2]
D6
BS
⎯
⎯
⎯
⎯
⎯
⎯
0
IFS
Bnk[1] Bnk[0]
WA[1]
). As long as the minimum inter-frame sep-
FA[1]
D5
⎯
⎯
⎯
⎯
⎯
⎯
0
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Not Implemented
Not Implemented
WA[0]
FA[0]
D4
⎯
⎯
⎯
⎯
⎯
⎯
0
Data
RD[3]
PA[3]
FD[3]
RA[3]
D3
⎯
⎯
⎯
⎯
⎯
⎯
RD[2]
RA[2]
PA[2]
FD[2]
D2
⎯
⎯
⎯
⎯
⎯
⎯
Section
MMA16xxNW
PA[1]
RD[1]
FD[1]
RA[1]
D1
⎯
⎯
⎯
⎯
⎯
⎯
4.2.1.
RD[0]
RA[0]
PA[0]
FD[0]
D0
⎯
⎯
⎯
⎯
⎯
⎯
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