mma1605nwr2 Freescale Semiconductor, Inc, mma1605nwr2 Datasheet - Page 17

• Manufacturer Part Number: mma1605nwr2
• Description: Dsi Inertial Sensor
• Manufacturer: Freescale Semiconductor, Inc

3.2
3.2.1
Factory programmed OTP array is locked and the lock is active. The lock is active only after an automatic OTP readout in which
the internal lock bit is read as ‘1’. Automatic OTP readouts occur only after POR or a DSI Clear Command is received.
calculated on the factory programmed OTP array, which includes the registers listed below:
uses a generator polynomial of g(x) = X
CRC_F[2:0] bits. If a CRC mismatch is detected, an internal data error is set and the device responds to DSI messages as spec-
ified in
the fuse array values.
3.2.2
when the User Programmable OTP array is locked and the lock is active. The lock is active only after an automatic OTP readout
in which the LOCK_U bit is read as ‘1’. Automatic OTP readouts occur only after POR or a DSI Clear Command is received.
registers listed below:
uses a generator polynomial of g(x) = X
grammed CRC, CRC_U[2:0], which is also included in the user programmable array. If a CRC mismatch is detected, an internal
data error is set, and the device responds to DSI messages as specified in
memory registers which hold a copy of the fuse array values, not the fuse array values. Writes to the User Programmable OTP
array using the Write NVM Command will update the mirror registers and result in a change to the CRC calculation regardless
of the state of the LOCK_U bit. A CRC mismatch will only be detected if the LOCK_U bit is active.
Sensors
Freescale Semiconductor
The Factory programmed OTP array is verified for errors with a 3-bit CRC. The CRC verification is enabled only when the
The Factory programmed OTP array is locked by Freescale and will always be active after POR. The CRC is continuously
Bits are fed in from right to left (LSB first), and top to bottom (lower addresses first) in the register map. The CRC verification
The User Programmable OTP array is independently verified for errors with a 3-bit CRC. The CRC verification is enabled only
Once the LOCK_U bit is active, the CRC is continuously calculated on the user programmable OTP Array, which includes the
Bits are fed in from right to left (LSB first), and top to bottom (lower addresses first) in the register map. The CRC verification
Factory Programmable Device Configuration
User Programmable OTP Array Lock Bit
Section
User Programmable OTP Array CRC
OTP Array Lock and CRC Verification
Factory Programmed OTP Array Lock and CRC Verification
User Programmable OTP Array Lock and CRC Verification
Factory Lock Bit Value in Fuse Array
Factory Lock Bit Value in Fuse Array
Factory OTP Array Lock Bit
User Data Registers 1 - 8
Serial Number Registers
Factory OTP Array CRC
User Data Register 0
4.3. The CRC verification is completed on the memory registers which hold a copy of the fuse array values, not
Register Name
Register Name
RESERVED Bit
Device Address
Type Register
Type Register
Device ID Bit
Attribute Bits
PCM Bit
Bits
0
1
1
0
1
1
3
3
+X+1, with a seed value = ‘111’. The calculated CRC is compared against the user pro-
+X+1, with a seed value = ‘111’. The calculated CRC is compared against the
Lock Bit Value in Mirror Register
Lock Bit Value in Mirror Register
After Automatic Readout
After Automatic Readout
DEVCFG1[1:0]: AT_OTP[1:0]
DEVCFG2[3:0]: ADDR[3:0]
DEVCFG[2:0]: CRC_U[2:0]
DEVCFG1[7:2]: UD00[5:0]
Register Addresses
Register Addresses
DEVCFG2[7]: LOCK_U
SN0, SN1, SN2, SN3
Internal Register Map
DEVCFG2[5]: PCM
DEVCFG[7]: 1
UD01 - UD08
DEVCFG2[4]
CRC_F[2:0]
TYPE[5:0]
TYPE[7:6]
LOCK_F
N/A
N/A
0
1
0
1
Section
4.3. The CRC verification is completed on the
Lock Bit Active?
Lock Bit Active?
YES
YES
NO
NO
NO
NO
Included in Factory CRC?
Included in User CRC?
CRC Verification
CRC Verification
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Enabled?
Enabled?
YES
YES
NO
NO
NO
NO
MMA16xxNW
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