EMD12164P Emlsi Inc., EMD12164P Datasheet - Page 7

• Manufacturer Part Number: EMD12164P
• Description: 512m 32m X 16 Mobile Ddr Sdram
• Manufacturer: Emlsi Inc.

Table 6: DC CHARACTERISTICS
Recommended operating conditions (Voltage referenced to VSS = 0V, T
Operating one bank
active-precharge
current
Precharge power-down
standby current
Precharge power-down
standby
clock stop
Precharge non power-
down standby current
Precharge non power-
down standby current
with clock stop
Active power-down
standby current
Active power-down
standby current with
clock stop
Active non power-down
standby current
Active non power-down
standby current with
clock stop
Operating burst read
current
Operating burst write
current
Auto-Refresh current
Self Refresh Current
Deep Power-Down
Current
Parameter
current
with
Symbol
I
I
I
I
I
I
DD2PS
I
DD2NS
I
DD3PS
I
DD3NS
I
DD4W
I
DD2P
DD2N
DD3P
DD3N
DD4R
I
I
I
DD0
DD5
DD6
DD8
t
between valid commands; address inputs are SWITCH-
ING; data bus inputs are STABLE
all banks idle, CKE is LOW; CSB is HIGH, t
address and control inputs are SWITCHING; data bus
inputs are STABLE
all banks idle, CKE is LOW; CSB is HIGH, CK = LOW,
CKB = HIGH; address and control inputs are SWITCHING;
data bus inputs are STABLE
all banks idle, CKE is HIGH; CSB is HIGH, t
address and control inputs are SWITCHING; data bus
inputs are STABLE
all banks idle, CKE is HIGH; CSB is HIGH, CK = LOW,
CKB = HIGH; address and control inputs are SWITCHING;
data bus inputs are STABLE
one bank active, CKE is LOW; CSB is HIGH, t
t
bus inputs are STABLE
one bank active, CKE is LOW; CSB is HIGH, CK = LOW,
CKB = HIGH; address and control inputs are SWITCHING;
data bus inputs are STABLE
one bank active, CKE is HIGH; CSB is HIGH, t
t
bus inputs are STABLE
one bank active, CKE is HIGH; CSB is HIGH, CK = LOW,
CKB = HIGH; address and control inputs are SWITCHING;
data bus inputs are STABLE
one bank active; BL=4; CL=3; t
read bursts; Iout = 0 mA; address inputs are SWITCHING;
50% data change each burst transfer
one bank active; t
address inputs are SWITCHING; 50% data change each
burst transfer
t
address and control inputs are SWITCHING; data bus
inputs are STABLE
CKE is LOW, CK = LOW, CKB
= HIGH; Extended Mode Reg-
ister set to all 0s; address and
control inputs are STABLE;
data bus inputs are STABLE
Address and Control inputs are STABLE;
data bus inputs are STABLE
RC
CKmin
CKmin
RC
= t
= t
; address and control inputs are SWITCHING; data
; address and control inputs are SWITCHING; data
RFCmin
RCmin
; t
; burst refresh; CKE is HIGH;
CK
CK
= t
CKmin
= t
Test Condition
CKmin
; CKE is HIGH; CSB is HIGH
7
; continuous write bursts;
CK
A
= t
= -25
CKmin
1/2 of Full Array
1/4 of Full Array
TCSR Range
Full Array
£
; continuous
CK
CK
to 85
512M: 32M x 16 Mobile DDR SDRAM
CK
= t
CK
= t
CKmin
=
£
CKmin
=
)
;
;
45*
100
130
120
110
-60
350
250
200
25
25
10
10
5
EMD12164P
1
Version
0.6
0.6
8
5
Preliminary
120
110
-75
600
500
450
80
20
25
10
90
10
85
5
Rev 0.0
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
°C