ds3104 Maxim Integrated Products, Inc., ds3104 Datasheet - Page 79
ds3104
Manufacturer Part Number
ds3104
Description
Ds3104 Line Card Timing Ic With Synchronous Ethernet Support
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS3104.pdf
(136 pages)
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 6: Digital2 Frequency (DIG2F[1:0]). This field, MCR6:DIG2SS, and MCR6:DIG2AF configure the
frequency of the Digital2 clock synthesizer.
Bits 5 to 4: Digital1 Frequency (DIG1F[1:0]). This field and MCR6:DIG1SS configure the frequency of the
Digital1 clock synthesizer.
Bit 1: Digital2 Source (DIG2SRC). This bit selects which DPLL the Digital 2 DFS is connected to. When
MCR4:LKT4T0 = 1 it is always connected to the T0 DPLL.
Bit 0: Digital1 Source (DIG1SRC). This bit selects to which DPLL the Digital 1 DFS is connected to. When
MCR4:LKT4T0 = 1 it is always connected to the T0 DPLL.
Rev: 012108
________________________________________________________________________________________ DS3104-SE
00 = 1544kHz
01 = 3088kHz
10 = 6176kHz
11 = 12,352kHz
00 = 1544kHz
01 = 3088kHz
10 = 6176kHz
11 = 12,352kHz
DIG2SS = 1
DIG1SS = 1
0 = T0 DPLL
1 = T4 DPLL
0 = T0 DPLL
1 = T4 DPLL
7
0
DIG2AF = 0
DIG2F[1:0]
00 = 2048kHz
01 = 4096kHz
10 = 8192kHz
11 = 16,384kHz
00 = 2048kHz
01 = 4096kHz
10 = 8192kHz
11 = 16,384kHz
DIG2SS = 0
DIG1SS = 0
6
0
MCR7
Master Configuration Register 7
39h
5
0
DIG1F[1:0]
00 = 19.44MHz
01 = 38.88MHz
10 = undefined
11 = undefined
DIG2SS = 1
4
0
DIG2AF = 1
—
3
1
00 = 6.312MHz
01 = undefined
10 = 10MHz
11 = undefined
DIG2SS = 0
—
2
0
DIG2SRC
1
0
DIG1SRC
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0
0
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