upd78f0124m6gba1-8et Renesas Electronics Corporation., upd78f0124m6gba1-8et Datasheet - Page 370

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upd78f0124m6gba1-8et

Manufacturer Part Number
upd78f0124m6gba1-8et
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
operation. Even if CLME is set to 1 by software during the oscillation stabilization time (reset value of OSTS register
is 05H (2
clock ends. Monitoring is automatically started at the end of the oscillation stabilization time.
370
Internal oscillation clock
Internal oscillation clock
RESET input clears bit 0 (CLME) of the clock monitor mode register (CLM) to 0 and stops the clock monitor
Internal reset signal
Clock monitor status
16
X1 input clock
CPU operation
/f
(CLME = 1 is set after RESET input and during X1 input clock oscillation stabilization time)
X1 input clock
XP
)) of the X1 input clock, monitoring is not performed until the oscillation stabilization time of the X1 input
CLMRF
CLME
RESET
CLME
(1) When internal reset is executed by oscillation stop of X1 input clock
Monitoring
operation
Normal
(2) Clock monitor status after RESET input
Figure 20-3. Timing of Clock Monitor (1/4)
Oscillation
Oscillation
stopped
stopped
Reset
CHAPTER 20 CLOCK MONITOR
User’s Manual U16315EJ3V1UD
4 clocks of internal oscillation clock
Clock supply
17 clocks
Monitoring stopped
stopped
Oscillation stabilization time
Normal operation (internal oscillation clock)
Set to 1 by software
stabilization time
Waiting for end
of oscillation
Monitoring

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