upd78f0124m6gba1-8et Renesas Electronics Corporation., upd78f0124m6gba1-8et Datasheet - Page 524

• Manufacturer Part Number: upd78f0124m6gba1-8et
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

524
16-bit
timer/
event
counter
00
(TM00)
Function
PRM00:
Prescaler mode
register 00
CR010: 16-bit
timer capture/
compare
register 010
CR000, CR010:
16-bit timer
capture/compare
registers 000,
010
PPG output
Pulse width
measurement
External event
counter
One-shot pulse
output:
Software trigger
One-shot pulse
output: External
trigger
Timer start
errors
16-bit timer
capture/
compare
register setting
Capture register
data retention
timing
Details of
Function
When P01 is used as the valid edge input pin of TI010, it cannot be used as the
timer output (TO00), and when used as TO00, it cannot be used as the valid edge
input pin of TI010.
To change the value of the duty factor (the value of the CR010 register) during
operation, see Caution 2 in Figure 6-15 PPG Output Operation Timing.
Values in the following range should be set in CR000 and CR010:
0000H ≤ CR010 < CR000 ≤ FFFFH
The pulse generated through PPG output has a cycle of [CR000 setting value + 1],
and has a duty of [(CR010 setting value + 1)/(CR000 setting value + 1)].
In the PPG output operation, change the pulse width (rewrite CR010) during TM00
operation using the following procedure.
<1> Disable the timer output inversion operation by match of TM00 and CR010
<2> Disable the INTTM010 interrupt (TMMK010 = 1)
<3> Rewrite CR010
<4> Wait for 1 cycle of the TM00 count clock
<5> Enable the timer output inversion operation by match of TM00 and CR010
<6> Clear the interrupt request flag of INTTM010 (TMIF010 = 0)
<7> Enable the INTTM010 interrupt (TMMK010 = 0)
To use two capture registers, set the TI000 and TI010 pins.
When reading the external event counter count value, TM00 should be read.
Do not set the OSPT00 bit to 1 again while the one-shot pulse is being output. To
output the one-shot pulse again, wait until the current one-shot pulse output is
completed.
When using the one-shot pulse output of 16-bit timer/event counter 00 with a
software trigger, do not change the level of the TI000 pin or its alternate-function
port pin.
Because the external trigger is valid even in this case, the timer is cleared and
started even at the level of the TI000 pin or its alternate-function port pin, resulting
in the output of a pulse at an undesired timing.
Do not set the CR000 and CR010 registers to 0000H.
16-bit timer counter 00 starts operating as soon as a value other than 00
(operation stop mode) is set to the TMC003 and TMC002 bits.
Do not input the external trigger again while the one-shot pulse is being output. To
output the one-shot pulse again, wait until the current one-shot pulse output is
completed.
Do not set the CR000 and CR010 registers to 0000H.
16-bit timer counter 00 starts operating as soon as a value other than 00
(operation stop mode) is set to the TMC003 and TMC002 bits.
An error of up to one clock may occur in the time required for a match signal to be
generated after timer start. This is because 16-bit timer counter 00 (TM00) is
started asynchronously to the count clock.
In the mode in which clear & start occurs on a match between TM00 and CR000,
set 16-bit timer capture/compare registers (000, 010 (CR000, CS010) to other
than 0000H. This means a 1-pulse count operation cannot be performed when
16-bit timer/event counter 00 is used as an external event counter.
The values of 16-bit timer capture/compare registers 000 and 010 (CR000 and
CR010) are not guaranteed after 16-bit timer/event counter 00 has been stopped.
(TOC004 = 0)
(TOC004 = 1)
APPENDIX D LIST OF CAUTIONS
User’s Manual U16315EJ3V1UD
Cautions
p. 140
p. 144
p. 145
p. 145
p. 146
p. 147
p. 157
p. 160
p. 160
p. 161
p. 162
p. 162
p. 163
p. 164
p. 165
p. 165
p. 165
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