74LCX16374MTDX Fairchild Semiconductor, 74LCX16374MTDX Datasheet

IC FLIP FLOP 16BIT D LV 48-TSSOP

74LCX16374MTDX

Manufacturer Part Number
74LCX16374MTDX
Description
IC FLIP FLOP 16BIT D LV 48-TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LCXr
Type
D-Type Busr
Datasheet

Specifications of 74LCX16374MTDX

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
2
Number Of Bits Per Element
8
Frequency - Clock
170MHz
Delay Time - Propagation
6.2ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Logic Family
LCX
Technology
CMOS
Number Of Bits
16
Number Of Elements
2
Clock-edge Trigger Type
Positive-Edge
Polarity
Non-Inverting
Operating Supply Voltage (typ)
2.5/3.3V
Package Type
TSSOP W
Propagation Delay Time
7.9ns
Low Level Output Current
24mA
High Level Output Current
-24mA
Frequency (max)
170MHz
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LCX16374MTDX
74LCX16374MTDXTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LCX16374MTDX
Manufacturer:
FAIRCHILD
Quantity:
1 758
Part Number:
74LCX16374MTDX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
© 2005 Fairchild Semiconductor Corporation
74LCX16374G
(Note 2)(Note 3)
74LCX16374MEA
(Note 3)
74LCX16374MTD
(Note 3)
74LCX16374
Low Voltage 16-Bit D-Type Flip-Flop
with 5V Tolerant Inputs and Outputs
General Description
The LCX16374 contains sixteen non-inverting D-type
flip-flops with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. A buff-
ered clock (CP) and Output Enable (OE) are common to
each byte and can be shorted together for full 16-bit opera-
tion.
The LCX16374 is designed for low voltage (2.5V or 3.3V)
V
environment.
The LCX16374 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Ordering Code:
Note 2: Ordering code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Order Number
CC
applications with capability of interfacing to a 5V signal
Package Number
BGA54A
MS48A
MTD48
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
DS012003
Features
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
resistor is determined by the current-sourcing capability of the driver.
5V tolerant inputs and outputs
2.3V–3.6V V
6.2 ns t
Power down high impedance inputs and outputs
Supports live insertion/withdrawal (Note 1)
r
Uses patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
ESD performance:
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
24 mA output drive (V
Human body model
Machine model
Package Description
PD
max (V
CC
CC
through a pull-up resistor: the minimum value or the
specifications provided
CC
!
200V
!
3.3V), 20
CC
2000V
3.0V)
February 1994
Revised May 2005
P
A I
CC
www.fairchildsemi.com
max

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74LCX16374MTDX Summary of contents

Page 1

... Note 2: Ordering code “G” indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2005 Fairchild Semiconductor Corporation Features 5V tolerant inputs and outputs 2.3V–3.6V V specifications provided CC 6 ...

Page 2

Connection Diagrams Pin Assignment for SSOP and TSSOP Pin Assignment for FBGA (Top Thru View) www.fairchildsemi.com Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW Clock Pulse Input n I –I Inputs –O ...

Page 3

Functional Description The LCX16374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to ...

Page 4

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 5

DC Electrical Characteristics Symbol Parameter I Quiescent Supply Current Increase in I per Input CC CC Note 7: Outputs disabled or 3-STATE only. AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PHL ...

Page 6

AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C t PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input Characteristics; ...

Page 7

Schematic Diagram Generic for LCX Family 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide www.fairchildsemi.com Package Number BGA54A 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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