MM74HC374WMX Fairchild Semiconductor, MM74HC374WMX Datasheet

MM74HC374WMX

Manufacturer Part Number

MM74HC374WMX

Description

IC FLIP FLOP OCT D 3-ST 20-SOIC

Manufacturer

Fairchild Semiconductor

Series

74HCr

Type

D-Type Busr

Datasheet

1.MM74HC374WMX.pdf (8 pages)

Specifications of MM74HC374WMX

Function

Standard

Output Type

Tri-State Non Inverted

Number Of Elements

Number Of Bits Per Element

Frequency - Clock

35MHz

Delay Time - Propagation

20ns

Trigger Type

Positive Edge

Current - Output High, Low

7.8mA, 7.8mA

Voltage - Supply

2 V ~ 6 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

20-SOIC (7.5mm Width)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

MM74HC374WMX
MM74HC374WMXTR

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MM74HC374WM

MM74HC374SJ

MM74HC374MTC

MM74HC374N

MM74HC374

3-STATE Octal D-Type Flip-Flop

General Description

The MM74HC374 high speed Octal D-Type Flip-Flops uti-

lize advanced silicon-gate CMOS technology. They pos-

sess the high noise immunity and low power consumption

of standard CMOS integrated circuits, as well as the ability

to drive 15 LS-TTL loads. Due to the large output drive

capability and the 3-STATE feature, these devices are ide-

ally suited for interfacing with bus lines in a bus organized

system.

These devices are positive edge triggered flip-flops. Data

at the D inputs, meeting the setup and hold time require-

ments, are transferred to the Q outputs on positive going

transitions of the CLOCK (CK) input. When a high logic

level is applied to the OUTPUT CONTROL (OC) input, all

outputs go to a high impedance state, regardless of what

signals are present at the other inputs and the state of the

storage elements.

The 74HC logic family is speed, function, and pinout com-

patible with the standard 74LS logic family. All inputs are

protected from damage due to static discharge by internal

diode clamps to V

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Order Number

Pin Assignments for DIP, SOIC, SOP and TSSOP

Package Number

and ground.

MTC20

Top View

M20D

M20B

N20A

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

DS005336

Features

Truth Table

established

Typical propagation delay: 20 ns

Wide operating voltage range: 2–6V

Low input current: 1

Low quiescent current: 80

Compatible with bus-oriented systems

Output drive capability: 15 LS-TTL loads

LOW Level

Transition from LOW-to-HIGH

Don't Care

High Impedance State

HIGH Level

Control

Output

The level of the output before steady state input conditions were

Package Description

Clock

A maximum

September 1983

Revised May 2005

Data

www.fairchildsemi.com

Output

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MM74HC374WMX Summary of contents

Page 1

... Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View © 2005 Fairchild Semiconductor Corporation Features Typical propagation delay Wide operating voltage range: 2–6V ...

Page 2

Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT Clamp Diode Current ( Output Current, per pin (I ) ...

Page 3

AC Electrical Characteristics q 5V Symbol Parameter f Maximum Operating MAX Frequency Maximum Propagation PHL PLH Delay Clock Maximum Output ...

Page 4

AC Electrical Characteristics 2.0 6.0V pF (unless otherwise specified Symbol Parameter Conditions f Maximum Operating MAX L Frequency Maximum Propagation C 50 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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