MT90870 Zarlink Semiconductor, Inc., MT90870 Datasheet - Page 27

• Manufacturer Part Number: MT90870
• Description: Flexible 12k Digital Switch (F12kDX)
• Manufacturer: Zarlink Semiconductor, Inc.

Preliminary Information
4.2.2
The data (channel control bit) transmitted by BCSTo0-3 replicates the Backplane Output Enable Bit (BE) of
the Backplane Connection Memory, with a LOW state indicating the channel be set to High Impedance. Section
12.4, Backplane Connection Memory Bit Definition, refers.
The BCSTo0-3 outputs transmit serial data (channel control bits) at 16.384Mb/s, with each bit representing the
per-channel high impedence state for specific streams. Four output streams are allocated to each control line
as follows:
The Channel Control Bit location, within a frame period, for each channel of the Backplane output streams is
presented in Table 4, BCSTo Allocation of Channel Control Bits to the Output Streams (32Mb/s Mode).
The BCSTo0-3 outputs data at a constant data-rate of 16.384Mb/s and all output streams, BSTo0-15, operate
at a data-rate of 32.768Mb/s.
As an aid to the description, the channel control bit for a single channel on specific streams is presented, with
reference to Table 4:
Figure 14, Backplane Port External High Impedance Control Timing (32Mb/s Mode) shows the channel control
bits for BCSTo0, BCSTo1, BCSTo2 and BCSTo3.
(1) The Channel Control Bit corresponding to Stream 0, Channel 0, BSTo0_Ch0, is transmitted on
BCSTo0 and is advanced, relative to the Frame Boundary, by six periods (clock period no. 2043) of
C16o.
(2) The Channel Control Bit corresponding to Stream 12, Channel 0, BSTo12_Ch0, is transmitted on
BCSTo0 in advance of the Frame Boundary by three periods (clock period no. 2046) of output clock,
C16o. Similarly, the Channel Control Bits for BSTo13_Ch0, BSTo14_Ch0 and BSTo15_Ch0 are
advanced relative to the Frame Boundary by three periods of C16o, on BCSTo1, BCSTo2 and
BCSTo3, respectively.
(3) For stream BSTo4 the value of the Channel Control Bit for Channel 510 will be transmitted during
the C16o clock period no. 2036 on BCSTo0.
(4) For stream BSTo5 the value of the Channel Control Bit for Channel 4 will be transmitted during the
C16o clock period no. 12 on BCSTo1.
(See also Pin Description)
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Table 4 - BCSTo Allocation of Channel Control Bits to the Output Streams (32Mb/s Mode).
BCSTo0 outputs the channel control bits for streams BSTo0, 4, 8, and 12.
BCSTo1 outputs the channel control bits for streams BSTo1, 5, 9, and 13.
BCSTo2 outputs the channel control bits for streams BSTo2, 6, 10, and 14.
BCSTo3 outputs the channel control bits for streams BSTo3, 7, 11, and 15.
BORS Set LOW, 32Mb/s Mode.
Period
C16o
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
1
BCSTo0
12
0
12
0
4
8
4
8
0
4
3-1
3-2
Allocated Stream No.
BCSTo1
13
13
1
5
9
1
5
9
1
5
3-2
BCSTo2
14
10
14
10
2
6
2
6
2
6
3-2
BCSTo3
15
15
11
11
3
7
3
7
3
7
3-2
Channel No.
32Mb/s
Ch 511
Ch 511
Ch 511
Ch 511
Ch 0
Ch 0
Ch 0
Ch 0
Ch 1
Ch 1
2
Frame
MT90870
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