LM3S310 Luminary Micro, Inc, LM3S310 Datasheet - Page 293

• Manufacturer Part Number: LM3S310
• Description: Lm3s310 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

July 5, 2006
Reset
Reset
Type
Type
Bit Field
PWM Interrupt Status and Clear (PWMISC)
Offset 0x01C
31:17
RO
RO
31
15
0
0
15:3
16
2
1
0
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C
This register provides a summary of the interrupt status of the individual PWM generator blocks. A
bit set to 1 indicates that the corresponding generator block is asserting an interrupt. The individual
interrupt status registers in each block must be consulted to determine the reason for the interrupt,
and used to clear the interrupt. For the fault interrupt, a write of 1 to that bit position clears the
latched interrupt status.
RO
RO
30
14
0
0
IntPWM2
IntPWM1
IntPWM0
reserved
reserved
IntFault
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
R/W1C
Type
RO
RO
RO
RO
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
reserved
Reset
RO
RO
25
0
9
0
0
0
0
0
0
0
Preliminary
reserved
RO
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Indicates if the fault input is asserting an interrupt.
Reserved bits return an indeterminate value, and should
never be changed.
Indicates if the PWM generator 2 block is asserting an
interrupt.
Indicates if the PWM generator 1 block is asserting an
interrupt.
Indicates if the PWM generator 0 block is asserting an
interrupt.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
IntPWM2
LM3S310 Data Sheet
RO
RO
0
18
0
2
IntPWM1
RO
RO
0
17
0
1
IntPWM0
IntFault
R/W1C
RO
0
16
0
0
293