LM3S310 Luminary Micro, Inc, LM3S310 Datasheet - Page 286

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LM3S310

Manufacturer Part Number
LM3S310
Description
Lm3s310 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Pulse Width Modulator (PWM)
286
Reset
Reset
Type
Type
Bit Field
PWM Master Control (PWMCTL)
Offset 0x000
RO
RO
31
15
0
0
31:3
2
1
0
Register 1: PWM Master Control (PWMCTL), offset 0x000
This register provides master control over the PWM generation blocks.
RO
RO
30
14
0
0
GlobalSync2
GlobalSync1
GlobalSync0
reserved
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
R/W
R/W
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
RO
RO
25
0
9
0
0
0
0
0
Preliminary
reserved
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
Same as GlobalSync0 but for PWM generator 2.
Same as GlobalSync0 but for PWM generator 1.
Setting this bit causes any queued update to a load or
comparator register in PWM generator 0 to be applied the
next time the corresponding counter becomes zero. This bit
automatically clears when the updates have completed; it
cannot be cleared by software.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
GlobalSync2
RO
R/W
18
0
2
0
GlobalSync1
RO
R/W
17
July 5, 2006
0
1
0
GlobalSync0
R/W
RO
16
0
0
0

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