LM3S310 Luminary Micro, Inc, LM3S310 Datasheet - Page 200

• Manufacturer Part Number: LM3S310
• Description: Lm3s310 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Universal Asynchronous Receivers/Transmitters (UARTs)
11.2.6
11.3
200
All of the interrupt events are ORed together before being sent to the interrupt controller, so the
UART can only generate a single interrupt request to the controller at any given time. Software can
service multiple interrupt events in a single interrupt service routine by reading the UART Masked
Interrupt Status (UARTMIS) register (see page 218).
The interrupt events that can trigger a controller-level interrupt are defined in the UART Interrupt
Mask (UARTIM) register (see page 215) by setting the corresponding IM bit to 1. If interrupts are
not used, the raw interrupt status is always visible via the UART Raw Interrupt Status (UARTRIS)
register (see page 217).
Interrupts are always cleared (for both the UARTMIS and UARTRIS registers) by setting the
corresponding bit in the UART Interrupt Clear (UARTICR) register (see page 219).
Loopback Operation
The UART can be placed into an internal loopback mode for diagnostic or debug work. This is
accomplished by setting the LBE bit in the UARTCTL register (see page 213). In loopback mode,
data transmitted on U0Tx is received on the U0Rx input, and data transmitted on U1Tx is received
on the U1Rx input.
Initialization and Configuration
To use the UARTs, the peripheral clock must be enabled by setting the UART0 or UART1 bits in the
RCGC1 register.
This section discusses the steps that are required for using a UART module. For this example, the
system clock is assumed to be 20 MHz and the desired UART configuration is:
The first thing to consider when programming the UART is the baud-rate divisor (BRD), since the
UARTIBRD and UARTFBRD registers must be written before the UARTLCRH register. Using the
equation described in “Baud-Rate Generation” on page 198, the BRD can be calculated:
BRD = 20,000,000 / (16 * 115,200) = 10.8507
which means that the DIVINT field of the UARTIBRD register (see page 209) should be set to 10.
The value to be loaded into the UARTFBRD register (see page 210) is calculated by the equation:
UARTFBRD[DIVFRAC] = integer(0.8507 * 64 + 0.5) = 54
With the BRD values in hand, the UART configuration is written to the module in the following
order:
1.
2.
Receive Timeout
Transmit (when condition defined in the TXIFLSEL bit in the UARTIFLS register is met)
Receive (when condition defined in the RXIFLSEL bit in the UARTIFLS register is met)
115200 baud rate
Data length of 8 bits
One stop bit
No parity
FIFOs disabled
No interrupts
Disable the UART by clearing the UARTEN bit in the UARTCTL register.
Write the integer portion of the BRD to the UARTIBRD register.
Preliminary
July 5, 2006