LM3S310 Luminary Micro, Inc, LM3S310 Datasheet - Page 292

• Manufacturer Part Number: LM3S310
• Description: Lm3s310 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Pulse Width Modulator (PWM)
292
Reset
Reset
Type
Type
Bit Field
PWM Raw Interrupt Status (PWMRIS)
Offset 0x018
31:17
RO
RO
31
15
0
0
15:3
16
2
1
0
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018
This register provides the current set of interrupt sources that are asserted, regardless of whether
they cause an interrupt to be asserted to the controller. The fault interrupt is latched on detection; it
must be cleared through the PWM Interrupt Status and Clear (PWMISC) register (see
page 293). The PWM generator interrupts simply reflect the status of the PWM generators; they
are cleared via the interrupt status register in the PWM generator blocks. Bits set to 1 indicate the
events that are active; a zero bit indicates that the event in question is not active.
RO
RO
30
14
0
0
IntPWM2
IntPWM1
IntPWM0
reserved
reserved
IntFault
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
RO
RO
RO
RO
RO
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
reserved
Reset
RO
RO
25
0
9
0
0
0
0
0
0
0
Preliminary
reserved
RO
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Indicates that the fault input has been asserted.
Reserved bits return an indeterminate value, and should
never be changed.
Indicates that the PWM generator 2 block is asserting its
interrupt.
Indicates that the PWM generator 1 block is asserting its
interrupt.
Indicates that the PWM generator 0 block is asserting its
interrupt.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
IntPWM2
RO
RO
18
0
2
0
IntPWM1
RO
RO
17
July 5, 2006
0
1
0
IntPWM0
IntFault
RO
RO
16
0
0
0