LM3S3739 Luminary Micro, Inc, LM3S3739 Datasheet - Page 490

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LM3S3739

Manufacturer Part Number
LM3S3739
Description
Lm3s3739 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Reset
Reset
Type
Type
Inter-Integrated Circuit (I
I2C Slave Interrupt Mask (I2CSIMR)
I2C Slave 0 base: 0x4002.0800
I2C Slave 1 base: 0x4002.1800
Offset 0x00C
Type R/W, reset 0x0000.0000
490
Bit/Field
31:3
RO
RO
2
1
0
31
15
0
0
RO
RO
Register 13: I
This register controls whether a raw interrupt is promoted to a controller interrupt.
30
14
0
0
RO
RO
STARTIM
29
13
reserved
STOPIM
0
0
DATAIM
Name
2
C) Interface
RO
RO
28
12
0
0
2
C Slave Interrupt Mask (I2CSIMR), offset 0x00C
RO
RO
27
11
0
0
Type
R/W
RO
RO
RO
RO
RO
26
10
0
0
reserved
RO
RO
Reset
25
0x00
0
9
0
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Stop Condition Interrupt Mask
This bit controls whether the raw interrupt for detection of a stop condition
on the I
is not masked and the interrupt is promoted; otherwise, the interrupt is
masked.
Start Condition Interrupt Mask
This bit controls whether the raw interrupt for detection of a start condition
on the I
is not masked and the interrupt is promoted; otherwise, the interrupt is
masked.
Data Interrupt Mask
This bit controls whether the raw interrupt for data received and data
requested is promoted to a controller interrupt. If set, the interrupt is not
masked and the interrupt is promoted; otherwise, the interrupt is masked.
RO
RO
23
0
7
0
2
2
C bus is promoted to a controller interrupt. If set, the interrupt
C bus is promoted to a controller interrupt. If set, the interrupt
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
STOPIM
RO
RO
18
0
2
0
STARTIM
RO
RO
17
0
1
0
June 02, 2008
DATAIM
R/W
RO
16
0
0
0

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