LM3S3739 Luminary Micro, Inc, LM3S3739 Datasheet - Page 273
LM3S3739
Manufacturer Part Number
LM3S3739
Description
Lm3s3739 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S3739.pdf
(664 pages)
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June 02, 2008
Bit/Field
7:0
Name
CR
Type
-
Reset
-
Preliminary
Description
GPIO Commit
On a bit-wise basis, any bit set allows the corresponding GPIOAFSEL
bit to be set to its alternate function.
Note:
The default register type for the GPIOCR register is RO for
all GPIO pins, with the exception of the NMI pin and the four
JTAG/SWD pins (PB7 and PC[3:0]). These five pins are
currently the only GPIOs that are protected by the GPIOCR
register. Because of this, the register type for GPIO Port B7
and GPIO Port C[3:0] is R/W.
The default reset value for the GPIOCR register is
0x0000.00FF for all GPIO pins, with the exception of the NMI
pin and the four JTAG/SWD pins (PB7 and PC[3:0]). To
ensure that the JTAG port is not accidentally programmed as
a GPIO, these four pins default to non-committable. To ensure
that the NMI pin is not accidentally programmed as the
non-maskable interrupt pin, it defaults to non-committable.
Because of this, the default reset value of GPIOCR for GPIO
Port B is 0x0000.007F while the default reset value of
GPIOCR for Port C is 0x0000.00F0.
LM3S3739 Microcontroller
273
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